Signal Name | Total Pterms | Total Inputs | Function Block | Macrocell | Slew Rate | Bank | Pin Number | Pin Type | Pin Use | Reg Use | I/O Std | I/O Style | Reg Init State |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|
LCD10_A | 7 | 9 | FB2 | MC1 | FAST | 2 | 1 | I/O/GTS2 | O | LVCMOS18 | |||
LCD10_B | 6 | 7 | FB2 | MC3 | FAST | 2 | 2 | I/O/GTS3 | O | LVCMOS18 | |||
LCD10_C | 6 | 9 | FB2 | MC5 | FAST | 2 | 3 | I/O/GTS0 | O | LVCMOS18 | |||
LCD10_D | 6 | 8 | FB2 | MC12 | FAST | 2 | 4 | I/O/GTS1 | O | LVCMOS18 | |||
LCD10_E | 5 | 8 | FB2 | MC14 | FAST | 2 | 6 | I/O | O | LVCMOS18 | |||
LCD10_F | 6 | 9 | FB2 | MC15 | FAST | 2 | 7 | I/O | O | LVCMOS18 | |||
LCD10_G | 7 | 7 | FB4 | MC1 | FAST | 2 | 8 | I/O | O | LVCMOS18 | |||
LCD10_DP | 2 | 2 | FB4 | MC2 | FAST | 2 | 9 | I/O | O | LVCMOS18 | |||
LCD1_A | 6 | 7 | FB4 | MC3 | FAST | 2 | 10 | I/O | O | LVCMOS18 | |||
LCD1_B | 5 | 7 | FB4 | MC5 | FAST | 2 | 11 | I/O | O | LVCMOS18 | |||
LCD1_C | 5 | 8 | FB4 | MC13 | FAST | 2 | 13 | I/O | O | LVCMOS18 | |||
LCD1_D | 6 | 8 | FB7 | MC14 | FAST | 1 | 14 | I/O | O | LVCMOS18 | |||
LCD1_E | 6 | 8 | FB7 | MC13 | FAST | 1 | 15 | I/O | O | LVCMOS18 | |||
LCD1_F | 6 | 9 | FB7 | MC12 | FAST | 1 | 16 | I/O | O | LVCMOS18 | |||
LCD1_G | 6 | 7 | FB7 | MC11 | FAST | 1 | 17 | I/O | O | LVCMOS18 | |||
LCD1_DP | 2 | 2 | FB7 | MC6 | FAST | 1 | 18 | I/O | O | LVCMOS18 | |||
LCD_BP | 3 | 8 | FB6 | MC4 | FAST | 1 | 27 | I/O/GCK2 | O | TFF | LVCMOS18 | RESET | |
LCDMuxInstance/RegLCD1<3> | 3 | 3 | FB3 | MC16 | 2 | 90 | I/O | (b) | DFF | RESET | |||
FDivInstance/FDivCnt<0> | 1 | 1 | FB1 | MC14 | 2 | 94 | I/O | (b) | TFF | RESET | |||
LCDMuxInstance/DotReg<0> | 2 | 2 | FB1 | MC13 | 2 | 95 | I/O | (b) | DFF | RESET | |||
FDivInstance/FDivCnt<1> | 2 | 2 | FB1 | MC12 | 2 | 96 | I/O | (b) | TFF | RESET | |||
FClk | 2 | 3 | FB1 | MC6 | 2 | 97 | I/O | (b) | TFF | RESET | |||
LCDMuxInstance/RegLCD10<0> | 3 | 3 | FB1 | MC3 | 2 | 99 | I/O/GSR | (b) | DFF | RESET | |||
FDiv<0> | 2 | 2 | FB1 | MC1 | (b) | (b) | RESET | ||||||
FDiv<1> | 3 | 3 | FB1 | MC2 | (b) | (b) | RESET | ||||||
FDiv<2> | 3 | 4 | FB1 | MC4 | (b) | (b) | RESET | ||||||
FDiv<3> | 3 | 5 | FB1 | MC5 | (b) | (b) | RESET | ||||||
FDiv<4> | 3 | 6 | FB1 | MC7 | (b) | (b) | RESET | ||||||
FDiv<5> | 3 | 7 | FB1 | MC8 | (b) | (b) | RESET | ||||||
FDiv<7> | 3 | 9 | FB1 | MC9 | (b) | (b) | RESET | ||||||
FDiv<8> | 3 | 10 | FB1 | MC10 | (b) | (b) | RESET | ||||||
FDiv<9> | 3 | 11 | FB1 | MC11 | (b) | (b) | RESET | ||||||
FDiv<10> | 3 | 12 | FB1 | MC15 | (b) | (b) | RESET | ||||||
FDiv<11> | 3 | 13 | FB1 | MC16 | (b) | (b) | RESET | ||||||
Cnt1<2> | 3 | 4 | FB2 | MC2 | (b) | (b) | RESET | ||||||
Cnt1<0> | 2 | 2 | FB2 | MC4 | (b) | (b) | RESET | ||||||
N_PZ_286 | 1 | 2 | FB2 | MC6 | (b) | (b) | |||||||
N_PZ_310 | 2 | 3 | FB2 | MC7 | (b) | (b) | |||||||
N_PZ_288 | 2 | 2 | FB2 | MC8 | (b) | (b) | |||||||
N_PZ_314 | 2 | 2 | FB2 | MC9 | (b) | (b) | |||||||
N_PZ_287 | 2 | 2 | FB2 | MC10 | (b) | (b) | |||||||
N_PZ_285 | 1 | 2 | FB2 | MC11 | (b) | (b) | |||||||
N_PZ_305 | 2 | 3 | FB2 | MC13 | (b) | (b) | |||||||
N_PZ_289 | 2 | 4 | FB2 | MC16 | (b) | (b) | |||||||
LCDMuxInstance/RegLCD1<2> | 3 | 3 | FB3 | MC1 | (b) | (b) | RESET | ||||||
LCDMuxInstance/RegLCD1<1> | 3 | 3 | FB3 | MC2 | (b) | (b) | RESET | ||||||
LCDMuxInstance/RegLCD1<0> | 3 | 3 | FB3 | MC3 | (b) | (b) | RESET | ||||||
LCDMuxInstance/RegLCD10<3> | 3 | 3 | FB3 | MC4 | (b) | (b) | RESET | ||||||
LCDMuxInstance/RegLCD10<2> | 3 | 3 | FB3 | MC6 | (b) | (b) | RESET | ||||||
LCDMuxInstance/RegLCD10<1> | 3 | 3 | FB3 | MC7 | (b) | (b) | RESET | ||||||
Cnt1<1> | 4 | 6 | FB3 | MC8 | (b) | (b) | RESET | ||||||
Cnt1<3> | 4 | 6 | FB3 | MC9 | (b) | (b) | RESET | ||||||
Cnt10<0> | 3 | 6 | FB3 | MC10 | (b) | (b) | RESET | ||||||
Cnt10<2> | 3 | 8 | FB3 | MC11 | (b) | (b) | RESET | ||||||
Cnt10<3> | 4 | 10 | FB3 | MC13 | (b) | (b) | RESET | ||||||
Cnt10<1> | 5 | 10 | FB3 | MC15 | (b) | (b) | RESET |