Signal Name | Total Pterms | Total Inputs | Function Block | Macrocell | Slew Rate | Bank | Pin Number | Pin Type | Pin Use | Reg Use | I/O Std | I/O Style | Reg Init State |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Seg_K | 2 | 3 | FB2 | MC1 | FAST | 2 | 1 | I/O/GTS2 | O | LVCMOS18 | |||
Seg_G | 11 | 19 | FB2 | MC3 | FAST | 2 | 2 | I/O/GTS3 | O | LVCMOS18 | |||
Seg_F | 11 | 20 | FB2 | MC5 | FAST | 2 | 3 | I/O/GTS0 | O | LVCMOS18 | |||
Seg_E | 11 | 18 | FB2 | MC12 | FAST | 2 | 4 | I/O/GTS1 | O | LVCMOS18 | |||
Seg_D | 12 | 20 | FB2 | MC14 | FAST | 2 | 6 | I/O | O | LVCMOS18 | |||
Seg_C | 10 | 19 | FB2 | MC15 | FAST | 2 | 7 | I/O | O | LVCMOS18 | |||
Seg_A | 11 | 21 | FB4 | MC1 | FAST | 2 | 8 | I/O | O | LVCMOS18 | |||
Seg_B | 13 | 21 | FB4 | MC2 | FAST | 2 | 9 | I/O | O | LVCMOS18 | |||
OutSig | 3 | 5 | FB4 | MC3 | FAST | 2 | 10 | I/O | O | TFF | LVCMOS18 | RESET | |
SpeedLed | 1 | 1 | FB7 | MC12 | FAST | 1 | 16 | I/O | O | LVCMOS18 | |||
DirLed | 2 | 3 | FB7 | MC11 | FAST | 1 | 17 | I/O | O | TFF/S | LVCMOS18 | SET | |
DSel0 | 1 | 2 | FB7 | MC6 | FAST | 1 | 18 | I/O | O | LVCMOS18 | |||
DSel1 | 1 | 2 | FB7 | MC5 | FAST | 1 | 19 | I/O | O | LVCMOS18 | |||
FDiv<2> | 3 | 4 | FB5 | MC6 | 1 | 22 | I/O/GCK0 | GCK/I | TFF | KPR | RESET | ||
FDiv<3> | 3 | 5 | FB5 | MC4 | 1 | 23 | I/O/GCK1 | (b) | TFF | RESET | |||
DSel2 | 1 | 2 | FB6 | MC2 | FAST | 1 | 24 | I/O/CDR | O | LVCMOS18 | |||
DSel3 | 1 | 2 | FB6 | MC4 | FAST | 1 | 27 | I/O/GCK2 | O | LVCMOS18 | |||
DirKeyInstance/ShRegister<2> | 3 | 3 | FB6 | MC12 | 1 | 28 | I/O/DGE | (b) | DFF | RESET | |||
DirKeyInstance/ShRegister<1> | 3 | 3 | FB6 | MC14 | 1 | 29 | I/O | (b) | DFF | RESET | |||
FDiv<6> | 3 | 8 | FB6 | MC16 | 1 | 30 | I/O | (b) | TFF | RESET | |||
ModeKeyInstance/ShRegister<0> | 2 | 2 | FB13 | MC13 | 1 | 56 | I/O | IR | DFF | KPR | |||
DirKeyInstance/ShRegister<0> | 2 | 2 | FB15 | MC11 | 1 | 58 | I/O | IR | DFF | KPR | |||
LCmpReg<2> | 4 | 6 | FB3 | MC16 | 2 | 90 | I/O | (b) | TFF | RESET | |||
N_PZ_528 | 1 | 3 | FB3 | MC14 | 2 | 91 | I/O | (b) | |||||
LCmpReg<0> | 3 | 3 | FB3 | MC12 | 2 | 92 | I/O | (b) | TFF | RESET | |||
UCmpReg<0> | 3 | 3 | FB3 | MC5 | 2 | 93 | I/O | (b) | TFF | RESET | |||
LCmpReg<4> | 4 | 8 | FB1 | MC14 | 2 | 94 | I/O | (b) | TFF | RESET | |||
UCmpReg<4> | 4 | 8 | FB1 | MC13 | 2 | 95 | I/O | (b) | TFF | RESET | |||
LCmpReg<3> | 4 | 7 | FB1 | MC12 | 2 | 96 | I/O | (b) | TFF | RESET | |||
UCmpReg<3> | 4 | 7 | FB1 | MC6 | 2 | 97 | I/O | (b) | TFF | RESET | |||
BinCnt<7> | 6 | 10 | FB1 | MC3 | 2 | 99 | I/O/GSR | (b) | TFF | RESET | |||
UCmpReg<5> | 4 | 9 | FB1 | MC1 | (b) | (b) | RESET | ||||||
LCmpReg<5> | 4 | 9 | FB1 | MC2 | (b) | (b) | RESET | ||||||
UCmpReg<6> | 4 | 10 | FB1 | MC4 | (b) | (b) | RESET | ||||||
UCmpReg<7> | 4 | 11 | FB1 | MC5 | (b) | (b) | RESET | ||||||
LCmpReg<6> | 4 | 10 | FB1 | MC7 | (b) | (b) | RESET | ||||||
LCmpReg<7> | 4 | 11 | FB1 | MC8 | (b) | (b) | RESET | ||||||
Mcompar_BinCnt_cmp_eq0000_AEB_or0000 | 16 | 16 | FB1 | MC9 | (b) | (b) | |||||||
N_PZ_556 | 2 | 10 | FB1 | MC10 | (b) | (b) | |||||||
N_PZ_542 | 2 | 10 | FB1 | MC11 | (b) | (b) | |||||||
N_PZ_540 | 2 | 10 | FB1 | MC15 | (b) | (b) | |||||||
N_PZ_592 | 4 | 18 | FB1 | MC16 | (b) | (b) | |||||||
FDivInstance/FDivCnt<1> | 2 | 2 | FB2 | MC10 | (b) | (b) | RESET | ||||||
FDivInstance/FDivCnt<0> | 1 | 1 | FB2 | MC11 | (b) | (b) | RESET | ||||||
Context_FFd1 | 3 | 4 | FB2 | MC13 | (b) | (b) | RESET | ||||||
Context_FFd2 | 3 | 5 | FB2 | MC16 | (b) | (b) | RESET | ||||||
LCmpReg<1> | 4 | 5 | FB3 | MC1 | (b) | (b) | RESET | ||||||
UCmpReg<1> | 4 | 5 | FB3 | MC2 | (b) | (b) | RESET | ||||||
UCmpReg<2> | 4 | 6 | FB3 | MC3 | (b) | (b) | RESET | ||||||
BinCnt<6> | 6 | 9 | FB3 | MC4 | (b) | (b) | RESET | ||||||
BinCnt<5> | 6 | 8 | FB3 | MC6 | (b) | (b) | RESET | ||||||
BinCnt<4> | 5 | 7 | FB3 | MC7 | (b) | (b) | RESET | ||||||
BinCnt<3> | 6 | 9 | FB3 | MC8 | (b) | (b) | RESET | ||||||
BinCnt<2> | 5 | 7 | FB3 | MC9 | (b) | (b) | RESET | ||||||
BinCnt<0> | 4 | 6 | FB3 | MC10 | (b) | (b) | RESET | ||||||
BinCnt<1> | 4 | 7 | FB3 | MC11 | (b) | (b) | RESET | ||||||
N_PZ_429 | 1 | 4 | FB3 | MC13 | (b) | (b) | |||||||
N_PZ_514 | 9 | 16 | FB3 | MC15 | (b) | (b) | |||||||
SetKeyStatus | 3 | 5 | FB4 | MC10 | (b) | (b) | RESET | ||||||
MachineState_FFd2 | 3 | 5 | FB4 | MC11 | (b) | (b) | RESET | ||||||
MachineState_FFd1 | 3 | 5 | FB4 | MC12 | (b) | (b) | RESET | ||||||
FClk | 2 | 3 | FB4 | MC14 | (b) | (b) | RESET | ||||||
MuxDisplInstance/SelCnt<0> | 2 | 2 | FB4 | MC15 | (b) | (b) | RESET | ||||||
MuxDisplInstance/SelCnt<1> | 3 | 3 | FB4 | MC16 | (b) | (b) | RESET | ||||||
FDiv<1> | 3 | 3 | FB5 | MC1 | (b) | (b) | RESET | ||||||
FDiv<0> | 2 | 2 | FB5 | MC2 | (b) | (b) | RESET | ||||||
N_PZ_732 | 1 | 2 | FB5 | MC3 | (b) | (b) | |||||||
SetupKeyInstance/DelayCnt<0> | 3 | 3 | FB5 | MC5 | (b) | (b) | RESET | ||||||
SetupKeyInstance/DelayCnt<1> | 3 | 4 | FB5 | MC7 | (b) | (b) | RESET | ||||||
SetupKeyInstance/DelayCnt<2> | 3 | 5 | FB5 | MC8 | (b) | (b) | RESET | ||||||
SetupKeyInstance/DelayCnt<3> | 3 | 6 | FB5 | MC9 | (b) | (b) | RESET | ||||||
SetupKeyInstance/DelayCnt<4> | 3 | 7 | FB5 | MC10 | (b) | (b) | RESET | ||||||
SetupKeyInstance/AutomatState_FFd1 | 7 | 11 | FB5 | MC11 | (b) | (b) | RESET | ||||||
SetupKeyInstance/AutomatState_FFd3 | 6 | 11 | FB5 | MC12 | (b) | (b) | RESET | ||||||
SetupKeyInstance/AutomatState_FFd4 | 10 | 11 | FB5 | MC13 | (b) | (b) | RESET | ||||||
SetupKeyInstance/AutomatState_FFd2 | 4 | 10 | FB5 | MC14 | (b) | (b) | RESET | ||||||
SetupKeyInstance/DelayCntEnable | 3 | 6 | FB5 | MC15 | (b) | (b) | RESET | ||||||
SetupKeyInstance/DelayCntClear | 3 | 6 | FB5 | MC16 | (b) | (b) | RESET | ||||||
FDiv<5> | 3 | 7 | FB6 | MC1 | (b) | (b) | RESET | ||||||
FDiv<4> | 3 | 6 | FB6 | MC3 | (b) | (b) | RESET | ||||||
N_PZ_445 | 2 | 3 | FB6 | MC5 | (b) | (b) | |||||||
N_PZ_513 | 2 | 2 | FB6 | MC6 | (b) | (b) | |||||||
N_PZ_428 | 2 | 2 | FB6 | MC7 | (b) | (b) | |||||||
OutFF_or000049 | 1 | 2 | FB6 | MC8 | (b) | (b) | |||||||
OutFF_or000041 | 1 | 2 | FB6 | MC9 | (b) | (b) | |||||||
OutFF_or000048 | 1 | 2 | FB6 | MC10 | (b) | (b) | |||||||
OutFF_or000040 | 1 | 2 | FB6 | MC11 | (b) | (b) | |||||||
OutFF_or000047 | 1 | 2 | FB6 | MC13 | (b) | (b) | |||||||
OutFF_or000039 | 1 | 2 | FB6 | MC15 | (b) | (b) | |||||||
DirKeyStatus | 2 | 4 | FB7 | MC7 | (b) | (b) | RESET | ||||||
ModeKeyStatus | 2 | 4 | FB7 | MC8 | (b) | (b) | RESET | ||||||
ModeKeyInstance/ShRegister<3> | 3 | 3 | FB7 | MC9 | (b) | (b) | RESET | ||||||
ModeKeyInstance/ShRegister<2> | 3 | 3 | FB7 | MC10 | (b) | (b) | RESET | ||||||
ModeKeyInstance/ShRegister<1> | 3 | 3 | FB7 | MC15 | (b) | (b) | RESET | ||||||
DirKeyInstance/ShRegister<3> | 3 | 3 | FB7 | MC16 | (b) | (b) | RESET |