Logic

Signal Name Total Pterms Total Inputs Function Block Macrocell Slew Rate Bank Pin Number Pin Type Pin Use Reg Use I/O Std I/O Style Reg Init State
Cnt1000<0> 3 15 FB1 MC10       (b) (b) TFF     RESET
Cnt1000<1> 5 19 FB1 MC16       (b) (b) TFF     RESET
Cnt1000<2> 3 17 FB1 MC11       (b) (b) TFF     RESET
Cnt1000<3> 4 19 FB1 MC15       (b) (b) TFF     RESET
Cnt100<0> 3 11 FB1 MC5       (b) (b) TFF     RESET
Cnt100<1> 5 15 FB1 MC8       (b) (b) TFF     RESET
Cnt100<2> 3 13 FB1 MC7       (b) (b) TFF     RESET
Cnt100<3> 4 15 FB1 MC9       (b) (b) TFF     RESET
Cnt10<0> 3 7 FB1 MC13   2 95 I/O (b) TFF     RESET
Cnt10<1> 5 11 FB1 MC2       (b) (b) TFF     RESET
Cnt10<2> 3 9 FB1 MC1       (b) (b) TFF     RESET
Cnt10<3> 4 11 FB1 MC4       (b) (b) TFF     RESET
Cnt1<0> 2 2 FB14 MC5   1 49 I/O IR TFF   KPR RESET
Cnt1<1> 4 7 FB1 MC14   2 94 I/O (b) TFF     RESET
Cnt1<2> 3 5 FB1 MC6   2 97 I/O (b) TFF     RESET
Cnt1<3> 4 7 FB1 MC12   2 96 I/O (b) TFF     RESET
DSel0 1 2 FB7 MC6 FAST 1 18 I/O O   LVCMOS18    
DSel1 1 2 FB7 MC5 FAST 1 19 I/O O   LVCMOS18    
DSel2 1 2 FB6 MC2 FAST 1 24 I/O/CDR O   LVCMOS18    
DSel3 1 2 FB6 MC4 FAST 1 27 I/O/GCK2 O   LVCMOS18    
FClk 2 3 FB2 MC11       (b) (b) TFF     RESET
FDiv<0> 2 2 FB2 MC10       (b) (b) TFF     RESET
FDiv<10> 3 12 FB3 MC13       (b) (b) TFF     RESET
FDiv<11> 3 13 FB3 MC15       (b) (b) TFF     RESET
FDiv<1> 3 3 FB2 MC9       (b) (b) TFF     RESET
FDiv<2> 3 4 FB2 MC8       (b) (b) TFF     RESET
FDiv<3> 3 5 FB2 MC7       (b) (b) TFF     RESET
FDiv<4> 3 6 FB2 MC6       (b) (b) TFF     RESET
FDiv<5> 3 7 FB2 MC4       (b) (b) TFF     RESET
FDiv<6> 3 8 FB2 MC2       (b) (b) TFF     RESET
FDiv<7> 3 9 FB3 MC9       (b) (b) TFF     RESET
FDiv<8> 3 10 FB3 MC10       (b) (b) TFF     RESET
FDiv<9> 3 11 FB3 MC11       (b) (b) TFF     RESET
FDivInstance/FDivCnt<0> 1 1 FB2 MC16       (b) (b) TFF     RESET
FDivInstance/FDivCnt<1> 2 2 FB2 MC13       (b) (b) TFF     RESET
MuxDisplInstance/SelCnt<0> 2 2 FB3 MC8       (b) (b) TFF     RESET
MuxDisplInstance/SelCnt<1> 3 3 FB3 MC7       (b) (b) TFF     RESET
MuxDisplInstance/Tetr<0> 4 8 FB1 MC3   2 99 I/O/GSR (b)        
MuxDisplInstance/Tetr<1> 4 8 FB3 MC6       (b) (b)        
MuxDisplInstance/Tetr<2> 4 8 FB3 MC4       (b) (b)        
MuxDisplInstance/Tetr<3> 4 8 FB3 MC3       (b) (b)        
Seg_A 3 4 FB4 MC1 FAST 2 8 I/O O   LVCMOS18    
Seg_B 3 4 FB4 MC2 FAST 2 9 I/O O   LVCMOS18    
Seg_C 3 4 FB2 MC15 FAST 2 7 I/O O   LVCMOS18    
Seg_D 4 4 FB2 MC14 FAST 2 6 I/O O   LVCMOS18    
Seg_E 3 4 FB2 MC12 FAST 2 4 I/O/GTS1 O   LVCMOS18    
Seg_F 3 4 FB2 MC5 FAST 2 3 I/O/GTS0 O   LVCMOS18    
Seg_G 3 4 FB2 MC3 FAST 2 2 I/O/GTS3 O   LVCMOS18    
Seg_K 0 0 FB2 MC1 FAST 2 1 I/O/GTS2 O   LVCMOS18