Design Name | DispLCD |
Fitting Status | Successful |
Software Version | J.36 |
Device Used | XC2C256-6-VQ100 |
Date | 5-24-2009, 11:24PM |
Macrocells Used | Pterms Used | Registers Used | Pins Used | Function Block Inputs Used |
---|---|---|---|---|
56/256 (22%) | 144/896 (17%) | 32/256 (13%) | 19/80 (24%) | 77/640 (13%) |
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Signal mapped onto global clock net (GCK0) | Clk |