Design Name | Clock |
Fitting Status | Successful |
Software Version | J.36 |
Device Used | XC2C256-6-VQ100 |
Date | 5-16-2009, 9:42PM |
Macrocells Used | Pterms Used | Registers Used | Pins Used | Function Block Inputs Used |
---|---|---|---|---|
91/256 (36%) | 216/896 (25%) | 58/256 (23%) | 16/80 (20%) | 160/640 (25%) |
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Signal mapped onto global clock net (GCK0) | Clk |