cpldfit:  version J.36                              Xilinx Inc.
                                  Fitter Report
Design Name: Freq                                Date:  5-21-2009, 10:31PM
Device Used: XC2C256-6-TQ144
Fitting Status: Successful

*************************  Mapped Resource Summary  **************************

Macrocells     Product Terms    Function Block   Registers      Pins           
Used/Tot       Used/Tot         Inps Used/Tot    Used/Tot       Used/Tot       
116/256 ( 45%) 237 /896  ( 26%) 192 /640  ( 30%) 99 /256 ( 39%) 18 /118 ( 15%)

** Function Block Resources **

Function Mcells   FB Inps  Pterms   IO       CTC      CTR      CTS      CTE     
Block    Used/Tot Used/Tot Used/Tot Used/Tot Used/Tot Used/Tot Used/Tot Used/Tot
FB1      16/16*    17/40    19/56     0/ 6    1/1*     1/1*     1/1*     0/1
FB2      16/16*    22/40    18/56     0/ 8    0/1      0/1      1/1*     0/1
FB3      16/16*    27/40    23/56     0/ 6    1/1*     1/1*     0/1      0/1
FB4      13/16     37/40    56/56*    0/ 8    1/1*     1/1*     1/1*     0/1
FB5      16/16*    35/40    37/56     0/ 5    1/1*     1/1*     1/1*     0/1
FB6      16/16*    19/40    33/56     0/ 8    0/1      1/1*     0/1      0/1
FB7       9/16     15/40    15/56     0/ 8    1/1*     1/1*     0/1      0/1
FB8       0/16      0/40     0/56     0/ 8    0/1      0/1      0/1      0/1
FB9       0/16      0/40     0/56     0/ 8    0/1      0/1      0/1      0/1
FB10      0/16      0/40     0/56     0/ 9    0/1      0/1      0/1      0/1
FB11      4/16      2/40     4/56     4/ 8    0/1      0/1      0/1      0/1
FB12      1/16      2/40     2/56     0/ 6    1/1*     0/1      1/1*     0/1
FB13      0/16      0/40     0/56     0/ 8    0/1      0/1      0/1      0/1
FB14      2/16      8/40     7/56     2/ 8    1/1*     0/1      1/1*     0/1
FB15      0/16      0/40     0/56     0/ 7    0/1      0/1      0/1      0/1
FB16      7/16      8/40    23/56     7/ 7*   0/1      0/1      0/1      0/1
         -----    -------  -------   -----    ---      ---      ---      ---
Total   116/256   192/640  237/896   13/118   7/16     6/16     6/16     0/16

CTC - Control Term Clock
CTR - Control Term Reset
CTS - Control Term Set
CTE - Control Term Output Enable

* - Resource is exhausted

** Global Control Resources **

GCK         GSR         GTS         
Used/Tot    Used/Tot    Used/Tot    
1/3         0/1         0/4

Signal 'Clk' mapped onto global clock net GCK2.

** Pin Resources **

Signal Type    Required     Mapped  |  Pin Type            Used    Total 
------------------------------------|------------------------------------
Input         :    4           4    |  I/O              :    15    108
Output        :   13          13    |  GCK/IO           :     1      3
Bidirectional :    0           0    |  GTS/IO           :     0      4
GCK           :    1           1    |  GSR/IO           :     1      1
GTS           :    0           0    |  CDR/IO           :     0      1
GSR           :    0           0    |  DGE/IO           :     1      1
                 ----        ----
        Total     18          18

End of Mapped Resource Summary
*************************  Summary of Mapped Logic  ************************

** 13 Outputs **

Signal                        Total Total Loc     Pin   Pin       Pin     I/O      I/O       Slew Reg     Reg Init
Name                          Pts   Inps          No.   Type      Use     STD      Style     Rate Use     State
DSel0                         1     2     FB11_13 126   I/O       O       LVCMOS18           FAST         
DSel1                         1     2     FB11_14 128   I/O       O       LVCMOS18           FAST         
DSel2                         1     2     FB11_15 129   I/O       O       LVCMOS18           FAST         
DSel3                         1     2     FB11_16 130   I/O       O       LVCMOS18           FAST         
RunLed                        3     3     FB14_4  69    I/O       O       LVCMOS18           FAST TFF     RESET
Seg_G                         4     5     FB14_16 61    I/O       O       LVCMOS18           FAST         
Seg_C                         4     5     FB16_5  60    I/O       O       LVCMOS18           FAST         
Seg_K                         2     3     FB16_6  59    I/O       O       LVCMOS18           FAST         
Seg_D                         5     5     FB16_11 58    I/O       O       LVCMOS18           FAST         
Seg_E                         4     5     FB16_12 57    I/O       O       LVCMOS18           FAST         
Seg_A                         5     5     FB16_13 56    I/O       O       LVCMOS18           FAST         
Seg_F                         4     5     FB16_15 54    I/O       O       LVCMOS18           FAST         
Seg_B                         4     5     FB16_16 53    I/O       O       LVCMOS18           FAST         

** 103 Buried Nodes **

Signal                        Total Total Loc     Reg     Reg Init
Name                          Pts   Inps          Use     State
GoKInstance/ShRegister<2>     3     3     FB1_1   DFF     RESET
GoKInstance/ShRegister<1>     3     3     FB1_2   DFF     RESET
GoKInstance/ShRegister<0>     3     3     FB1_3   DFF     RESET
RangeKInstance/ShRegister<3>  3     3     FB1_4   DFF     RESET
FClk                          2     8     FB1_5   TFF     RESET
RangeKInstance/ShRegister<2>  3     3     FB1_6   DFF     RESET
FDivInstance/FDivCnt<6>       2     7     FB1_7   TFF     RESET
FDivInstance/FDivCnt<5>       2     6     FB1_8   TFF     RESET
FDivInstance/FDivCnt<4>       2     5     FB1_9   TFF     RESET
FDivInstance/FDivCnt<3>       2     4     FB1_10  TFF     RESET
FDivInstance/FDivCnt<2>       2     3     FB1_11  TFF     RESET
RangeKInstance/ShRegister<1>  3     3     FB1_12  DFF     RESET
GoKeyStatus                   2     4     FB1_13  LATCH   RESET
GoKInstance/ShRegister<3>     3     3     FB1_14  DFF     RESET
FDivInstance/FDivCnt<1>       2     2     FB1_15  TFF     RESET
FDivInstance/FDivCnt<0>       1     1     FB1_16  TFF     RESET
F1HzCnt<17>                   3     22    FB2_1   TFF     RESET
F1HzCnt<8>                    2     10    FB2_2   TFF     RESET
F1HzCnt<16>                   3     22    FB2_3   TFF     RESET
F1HzCnt<14>                   3     22    FB2_4   TFF     RESET
F1HzCnt<15>                   2     17    FB2_5   TFF     RESET
F1HzCnt<7>                    2     9     FB2_6   TFF     RESET
F1HzCnt<5>                    2     7     FB2_7   TFF     RESET
F1HzCnt<4>                    2     6     FB2_8   TFF     RESET
F1HzCnt<3>                    2     5     FB2_9   TFF     RESET
F1HzCnt<2>                    2     4     FB2_10  TFF     RESET
F1HzCnt<1>                    2     3     FB2_11  TFF     RESET
F1HzCnt<13>                   2     15    FB2_12  TFF     RESET
F1HzCnt<12>                   2     14    FB2_13  TFF     RESET
F1HzCnt<11>                   2     13    FB2_14  TFF     RESET
F1HzCnt<10>                   2     12    FB2_15  TFF     RESET
F1HzCnt<0>                    2     2     FB2_16  TFF     RESET
Cnt100<0>                     3     11    FB3_1   TFF     RESET
Cnt100<2>                     3     13    FB3_2   TFF     RESET
Cnt100<1>                     5     15    FB3_3   TFF     RESET
Cnt1000<1>                    5     19    FB3_4   TFF     RESET
Cnt100<3>                     4     15    FB3_5   TFF     RESET
Cnt1000<3>                    4     19    FB3_6   TFF     RESET
Cnt10000<0>                   3     19    FB3_7   TFF     RESET
Cnt10000<2>                   3     21    FB3_8   TFF     RESET

Signal                        Total Total Loc     Reg     Reg Init
Name                          Pts   Inps          Use     State
Cnt10000<1>                   5     23    FB3_9   TFF     RESET
Cnt10000<3>                   4     23    FB3_10  TFF     RESET
Cnt100000<0>                  3     23    FB3_11  TFF     RESET
Cnt100000<2>                  3     25    FB3_12  TFF     RESET
Cnt100000<3>                  4     27    FB3_13  TFF     RESET
Cnt1000<0>                    3     15    FB3_14  TFF     RESET
Cnt100000<1>                  5     27    FB3_15  TFF     RESET
Cnt1000<2>                    3     17    FB3_16  TFF     RESET
MachineState_FFd2             4     7     FB4_4   TFF     RESET
MachineState_FFd3             5     7     FB4_5   DFF     RESET
F1HzEnable                    4     5     FB4_6   DFF     RESET
MachineState_FFd1             3     4     FB4_7   TFF     RESET
MuxDisplInstance/SelCnt<0>    2     2     FB4_8   TFF     RESET
MuxDisplInstance/SelCnt<1>    3     3     FB4_9   TFF     RESET
MuxDisplInstance/Tetr<3>      8     9     FB4_10          
MuxDisplInstance/Tetr<2>      8     9     FB4_11          
Clr                           2     5     FB4_12  DFF     RESET
MuxDisplInstance/Tetr<1>      8     9     FB4_13          
HzRange                       2     4     FB4_14  TFF     RESET
MuxDisplInstance/Tetr<0>      8     9     FB4_15          
MuxDisplInstance/Blank        5     23    FB4_16          
Cnt10<1>                      5     11    FB5_1   TFF     RESET
R10<3>                        3     4     FB5_2   DEFF    RESET
Cnt10<2>                      3     9     FB5_3   TFF     RESET
R10<2>                        3     4     FB5_4   DEFF    RESET
R10<1>                        3     4     FB5_5   DEFF    RESET
R10<0>                        3     4     FB5_6   DEFF    RESET
Cnt1<3>                       4     7     FB5_7   TFF     RESET
Cnt10<0>                      3     7     FB5_8   TFF     RESET
Cnt1<1>                       4     7     FB5_9   TFF     RESET
Cnt1<2>                       3     5     FB5_10  TFF     RESET
Cnt1<0>                       3     3     FB5_11  TFF     RESET
F1HzCnt<9>                    3     22    FB5_12  TFF     RESET
F1HzCnt<19>                   3     22    FB5_13  TFF     RESET
Cnt10<3>                      4     11    FB5_14  TFF     RESET
F1HzCnt<18>                   3     22    FB5_15  TFF     RESET
F1HzCnt<6>                    9     22    FB5_16  TFF     RESET
R100<3>                       3     4     FB6_1   DEFF    RESET
R100<2>                       3     4     FB6_2   DEFF    RESET
R10000<3>                     3     4     FB6_3   DEFF    RESET

Signal                        Total Total Loc     Reg     Reg Init
Name                          Pts   Inps          Use     State
R100<1>                       3     4     FB6_4   DEFF    RESET
R10000<2>                     3     4     FB6_5   DEFF    RESET
R10000<1>                     3     4     FB6_6   DEFF    RESET
R10000<0>                     3     4     FB6_7   DEFF    RESET
R100000<3>                    3     4     FB6_8   DEFF    RESET
R100000<2>                    3     4     FB6_9   DEFF    RESET
R100000<1>                    3     4     FB6_10  DEFF    RESET
R100000<0>                    3     4     FB6_11  DEFF    RESET
R100<0>                       3     4     FB6_12  DEFF    RESET
R1000<3>                      3     4     FB6_13  DEFF    RESET
R1000<2>                      3     4     FB6_14  DEFF    RESET
R1000<1>                      3     4     FB6_15  DEFF    RESET
R1000<0>                      3     4     FB6_16  DEFF    RESET
R1<3>                         3     4     FB7_1   DEFF    RESET
R1<2>                         3     4     FB7_2   DEFF    RESET
R1<1>                         3     4     FB7_3   DEFF    RESET
R1<0>                         3     4     FB7_4   DEFF    RESET
FDiv<0>                       2     2     FB7_7   TFF     RESET
FDiv<1>                       3     3     FB7_8   TFF     RESET
FDiv<2>                       3     4     FB7_9   TFF     RESET
FDiv<3>                       3     5     FB7_10  TFF     RESET
RangeKeyStatus                2     4     FB7_16  LATCH   RESET
RangeKInstance/ShRegister<0>  2     2     FB12_15 DFF     RESET

** 5 Inputs **

Signal                        Loc     Pin   Pin       Pin     I/O      I/O
Name                                  No.   Type      Use     STD      Style
GoKey                         FB1_3   143   GSR/I/O   I       LVCMOS18 PU
FInp                          FB2_15  10    I/O       I       LVCMOS18 PU
Clk                           FB6_4   38    GCK/I/O   GCK     LVCMOS18 PU
Reset                         FB6_12  39    DGE/I/O   I       LVCMOS18 PU
RangeKey                      FB12_15 94    I/O       I       LVCMOS18 PU

Legend:
Pin No.   - ~     - User Assigned
I/O Style - OD    - OpenDrain
          - PU    - Pullup
          - KPR   - Keeper
          - S     - SchmittTrigger
          - DG    - DataGate
Reg Use   - LATCH - Transparent latch
          - DFF   - D-flip-flop
          - DEFF  - D-flip-flop with clock enable
          - TFF   - T-flip-flop
          - TDFF  - Dual-edge-triggered T-flip-flop
          - DDFF  - Dual-edge-triggered flip-flop
          - DDEFF - Dual-edge-triggered flip-flop with clock enable
          /S (after any above flop/latch type) indicates initial state is Set
**************************  Function Block Details  ************************
Legend:
Total Pt     - Total product terms used by the macrocell signal
Loc          - Location where logic was mapped in device
Pin Type/Use - I  - Input             GCK - Global clock
               O  - Output            GTS - Global Output Enable
              (b) - Buried macrocell  GSR - Global Set/Reset
              VRF - Vref
Pin No.      - ~  - User Assigned
*********************************** FB1  ***********************************
This function block is part of I/O Bank number:               2
Number of function block inputs used/remaining:               17/23
Number of function block control terms used/remaining:        3/1
Number of PLA product terms used/remaining:                   19/37
Signal                        Total Loc     Pin  Pin     Pin   CTC CTR CTS CTE
Name                          Pt            No.  Type    Use   
GoKInstance/ShRegister<2>     3     FB1_1        (b)     (b)    +       +  
GoKInstance/ShRegister<1>     3     FB1_2        (b)     (b)    +       +  
GoKInstance/ShRegister<0>     3     FB1_3   143  GSR/I/O I      +       +  
RangeKInstance/ShRegister<3>  3     FB1_4   142  I/O     (b)    +       +  
FClk                          2     FB1_5        (b)     (b)        +      
RangeKInstance/ShRegister<2>  3     FB1_6   140  I/O     (b)    +       +  
FDivInstance/FDivCnt<6>       2     FB1_7        (b)     (b)        +      
FDivInstance/FDivCnt<5>       2     FB1_8        (b)     (b)        +      
FDivInstance/FDivCnt<4>       2     FB1_9        (b)     (b)        +      
FDivInstance/FDivCnt<3>       2     FB1_10       (b)     (b)        +      
FDivInstance/FDivCnt<2>       2     FB1_11       (b)     (b)        +      
RangeKInstance/ShRegister<1>  3     FB1_12  139  I/O     (b)    +       +  
GoKeyStatus                   2     FB1_13  138  I/O     (b)               
GoKInstance/ShRegister<3>     3     FB1_14  137  I/O     (b)    +       +  
FDivInstance/FDivCnt<1>       2     FB1_15       (b)     (b)        +      
FDivInstance/FDivCnt<0>       1     FB1_16       (b)     (b)        +      

Signals Used by Logic in Function Block
  1: Clr                       7: FDivInstance/FDivCnt<4>    13: GoKInstance/ShRegister<3> 
  2: FDiv<2>                   8: FDivInstance/FDivCnt<5>    14: RangeKInstance/ShRegister<0> 
  3: FDivInstance/FDivCnt<0>   9: FDivInstance/FDivCnt<6>    15: RangeKInstance/ShRegister<1> 
  4: FDivInstance/FDivCnt<1>  10: GoKInstance/ShRegister<0>  16: RangeKInstance/ShRegister<2> 
  5: FDivInstance/FDivCnt<2>  11: GoKInstance/ShRegister<1>  17: Reset 
  6: FDivInstance/FDivCnt<3>  12: GoKInstance/ShRegister<2> 

Signal                     1         2         3         4 FB      
Name             0----+----0----+----0----+----0----+----0 Inputs  
GoKInstance/ShRegister<2> 
                  .X........X.....X....................... 3       
GoKInstance/ShRegister<1> 
                  .X.......X......X....................... 3       
GoKInstance/ShRegister<0> 
                  XX..............X....................... 3       
RangeKInstance/ShRegister<3> 
                  .X.............XX....................... 3       
FClk              ..XXXXXXX.......X....................... 8       
RangeKInstance/ShRegister<2> 
                  .X............X.X....................... 3       
FDivInstance/FDivCnt<6> 
                  ..XXXXXX........X....................... 7       
FDivInstance/FDivCnt<5> 
                  ..XXXXX.........X....................... 6       
FDivInstance/FDivCnt<4> 
                  ..XXXX..........X....................... 5       
FDivInstance/FDivCnt<3> 
                  ..XXX...........X....................... 4       
FDivInstance/FDivCnt<2> 
                  ..XX............X....................... 3       
RangeKInstance/ShRegister<1> 
                  .X...........X..X....................... 3       
GoKeyStatus       .........XXXX........................... 4       
GoKInstance/ShRegister<3> 
                  .X.........X....X....................... 3       
FDivInstance/FDivCnt<1> 
                  ..X.............X....................... 2       
FDivInstance/FDivCnt<0> 
                  ................X....................... 1       
                 0----+----1----+----2----+----3----+----4
                           0         0         0         0
*********************************** FB2  ***********************************
This function block is part of I/O Bank number:               2
Number of function block inputs used/remaining:               22/18
Number of function block control terms used/remaining:        1/3
Number of PLA product terms used/remaining:                   18/38
Signal                        Total Loc     Pin  Pin     Pin   CTC CTR CTS CTE
Name                          Pt            No.  Type    Use   
F1HzCnt<17>                   3     FB2_1   2    GTS/I/O (b)            +  
F1HzCnt<8>                    2     FB2_2        (b)     (b)            +  
F1HzCnt<16>                   3     FB2_3   3    GTS/I/O (b)            +  
F1HzCnt<14>                   3     FB2_4   4    I/O     (b)            +  
F1HzCnt<15>                   2     FB2_5   5    GTS/I/O (b)            +  
F1HzCnt<7>                    2     FB2_6        (b)     (b)            +  
F1HzCnt<5>                    2     FB2_7        (b)     (b)            +  
F1HzCnt<4>                    2     FB2_8        (b)     (b)            +  
F1HzCnt<3>                    2     FB2_9        (b)     (b)            +  
F1HzCnt<2>                    2     FB2_10       (b)     (b)            +  
F1HzCnt<1>                    2     FB2_11       (b)     (b)            +  
F1HzCnt<13>                   2     FB2_12  6    GTS/I/O (b)            +  
F1HzCnt<12>                   2     FB2_13  7    I/O     (b)            +  
F1HzCnt<11>                   2     FB2_14  9    I/O     (b)            +  
F1HzCnt<10>                   2     FB2_15  10   I/O     I              +  
F1HzCnt<0>                    2     FB2_16       (b)     (b)            +  

Signals Used by Logic in Function Block
  1: F1HzCnt<0>         9: F1HzCnt<17>       16: F1HzCnt<5> 
  2: F1HzCnt<10>       10: F1HzCnt<18>       17: F1HzCnt<6> 
  3: F1HzCnt<11>       11: F1HzCnt<19>       18: F1HzCnt<7> 
  4: F1HzCnt<12>       12: F1HzCnt<1>        19: F1HzCnt<8> 
  5: F1HzCnt<13>       13: F1HzCnt<2>        20: F1HzCnt<9> 
  6: F1HzCnt<14>       14: F1HzCnt<3>        21: F1HzEnable 
  7: F1HzCnt<15>       15: F1HzCnt<4>        22: GoKInstance/ShRegister<0>.COMB 
  8: F1HzCnt<16>      

Signal                     1         2         3         4 FB      
Name             0----+----0----+----0----+----0----+----0 Inputs  
F1HzCnt<17>       XXXXXXXXXXXXXXXXXXXXXX.................. 22      
F1HzCnt<8>        X..........XXXXXXX..XX.................. 10      
F1HzCnt<16>       XXXXXXXXXXXXXXXXXXXXXX.................. 22      
F1HzCnt<14>       XXXXXXXXXXXXXXXXXXXXXX.................. 22      
F1HzCnt<15>       XXXXXX.....XXXXXXXXXXX.................. 17      
F1HzCnt<7>        X..........XXXXXX...XX.................. 9       
F1HzCnt<5>        X..........XXXX.....XX.................. 7       
F1HzCnt<4>        X..........XXX......XX.................. 6       
F1HzCnt<3>        X..........XX.......XX.................. 5       
F1HzCnt<2>        X..........X........XX.................. 4       
F1HzCnt<1>        X...................XX.................. 3       
F1HzCnt<13>       XXXX.......XXXXXXXXXXX.................. 15      
F1HzCnt<12>       XXX........XXXXXXXXXXX.................. 14      
F1HzCnt<11>       XX.........XXXXXXXXXXX.................. 13      
F1HzCnt<10>       X..........XXXXXXXXXXX.................. 12      
F1HzCnt<0>        ....................XX.................. 2       
                 0----+----1----+----2----+----3----+----4
                           0         0         0         0
*********************************** FB3  ***********************************
This function block is part of I/O Bank number:               2
Number of function block inputs used/remaining:               27/13
Number of function block control terms used/remaining:        2/2
Number of PLA product terms used/remaining:                   23/33
Signal                        Total Loc     Pin  Pin     Pin   CTC CTR CTS CTE
Name                          Pt            No.  Type    Use   
Cnt100<0>                     3     FB3_1   136  I/O     (b)    +   +      
Cnt100<2>                     3     FB3_2   135  I/O     (b)    +   +      
Cnt100<1>                     5     FB3_3   134  I/O     (b)    +   +      
Cnt1000<1>                    5     FB3_4        (b)     (b)    +   +      
Cnt100<3>                     4     FB3_5   133  I/O     (b)    +   +      
Cnt1000<3>                    4     FB3_6        (b)     (b)    +   +      
Cnt10000<0>                   3     FB3_7        (b)     (b)    +   +      
Cnt10000<2>                   3     FB3_8        (b)     (b)    +   +      
Cnt10000<1>                   5     FB3_9        (b)     (b)    +   +      
Cnt10000<3>                   4     FB3_10       (b)     (b)    +   +      
Cnt100000<0>                  3     FB3_11       (b)     (b)    +   +      
Cnt100000<2>                  3     FB3_12       (b)     (b)    +   +      
Cnt100000<3>                  4     FB3_13       (b)     (b)    +   +      
Cnt1000<0>                    3     FB3_14  132  I/O     (b)    +   +      
Cnt100000<1>                  5     FB3_15       (b)     (b)    +   +      
Cnt1000<2>                    3     FB3_16  131  I/O     (b)    +   +      

Signals Used by Logic in Function Block
  1: Cnt100000<0>      10: Cnt1000<1>        19: Cnt10<2> 
  2: Cnt100000<1>      11: Cnt1000<2>        20: Cnt10<3> 
  3: Cnt100000<2>      12: Cnt1000<3>        21: Cnt1<0> 
  4: Cnt100000<3>      13: Cnt100<0>         22: Cnt1<1> 
  5: Cnt10000<0>       14: Cnt100<1>         23: Cnt1<2> 
  6: Cnt10000<1>       15: Cnt100<2>         24: Cnt1<3> 
  7: Cnt10000<2>       16: Cnt100<3>         25: FInp 
  8: Cnt10000<3>       17: Cnt10<0>          26: GoKInstance/ShRegister<0>.COMB 
  9: Cnt1000<0>        18: Cnt10<1>          27: RunLed 

Signal                     1         2         3         4 FB      
Name             0----+----0----+----0----+----0----+----0 Inputs  
Cnt100<0>         ................XXXXXXXXXXX............. 11      
Cnt100<2>         ............XX..XXXXXXXXXXX............. 13      
Cnt100<1>         ............XXXXXXXXXXXXXXX............. 15      
Cnt1000<1>        ........XXXXXXXXXXXXXXXXXXX............. 19      
Cnt100<3>         ............XXXXXXXXXXXXXXX............. 15      
Cnt1000<3>        ........XXXXXXXXXXXXXXXXXXX............. 19      
Cnt10000<0>       ........XXXXXXXXXXXXXXXXXXX............. 19      
Cnt10000<2>       ....XX..XXXXXXXXXXXXXXXXXXX............. 21      
Cnt10000<1>       ....XXXXXXXXXXXXXXXXXXXXXXX............. 23      
Cnt10000<3>       ....XXXXXXXXXXXXXXXXXXXXXXX............. 23      
Cnt100000<0>      ....XXXXXXXXXXXXXXXXXXXXXXX............. 23      
Cnt100000<2>      XX..XXXXXXXXXXXXXXXXXXXXXXX............. 25      
Cnt100000<3>      XXXXXXXXXXXXXXXXXXXXXXXXXXX............. 27      
Cnt1000<0>        ............XXXXXXXXXXXXXXX............. 15      
Cnt100000<1>      XXXXXXXXXXXXXXXXXXXXXXXXXXX............. 27      
Cnt1000<2>        ........XX..XXXXXXXXXXXXXXX............. 17      
                 0----+----1----+----2----+----3----+----4
                           0         0         0         0
*********************************** FB4  ***********************************
This function block is part of I/O Bank number:               2
Number of function block inputs used/remaining:               37/3
Number of function block control terms used/remaining:        3/1
Number of PLA product terms used/remaining:                   56/0
Signal                        Total Loc     Pin  Pin     Pin   CTC CTR CTS CTE
Name                          Pt            No.  Type    Use   
(unused)                      0     FB4_1   11   I/O           
(unused)                      0     FB4_2   12   I/O           
(unused)                      0     FB4_3   13   I/O           
MachineState_FFd2             4     FB4_4   14   I/O     (b)        +      
MachineState_FFd3             5     FB4_5   15   I/O     (b)        +      
F1HzEnable                    4     FB4_6   16   I/O     (b)               
MachineState_FFd1             3     FB4_7        (b)     (b)        +      
MuxDisplInstance/SelCnt<0>    2     FB4_8        (b)     (b)    +   +      
MuxDisplInstance/SelCnt<1>    3     FB4_9        (b)     (b)    +   +      
MuxDisplInstance/Tetr<3>      8     FB4_10       (b)     (b)               
MuxDisplInstance/Tetr<2>      8     FB4_11       (b)     (b)               
Clr                           2     FB4_12  17   I/O     (b)               
MuxDisplInstance/Tetr<1>      8     FB4_13       (b)     (b)               
HzRange                       2     FB4_14  18   I/O     (b)            +  
MuxDisplInstance/Tetr<0>      8     FB4_15       (b)     (b)               
MuxDisplInstance/Blank        5     FB4_16       (b)     (b)               

Signals Used by Logic in Function Block
  1: Clr                         14: R100000<3>        26: R100<3> 
  2: F1HzEnable                  15: R10000<0>         27: R10<0> 
  3: FDiv<3>                     16: R10000<1>         28: R10<1> 
  4: GoKeyStatus                 17: R10000<2>         29: R10<2> 
  5: HzRange                     18: R10000<3>         30: R10<3> 
  6: MachineState_FFd1           19: R1000<0>          31: R1<0> 
  7: MachineState_FFd2           20: R1000<1>          32: R1<1> 
  8: MachineState_FFd3           21: R1000<2>          33: R1<2> 
  9: MuxDisplInstance/SelCnt<0>  22: R1000<3>          34: R1<3> 
 10: MuxDisplInstance/SelCnt<1>  23: R100<0>           35: RangeKeyStatus 
 11: R100000<0>                  24: R100<1>           36: Reset 
 12: R100000<1>                  25: R100<2>           37: RunLed 
 13: R100000<2>                 

Signal                     1         2         3         4 FB      
Name             0----+----0----+----0----+----0----+----0 Inputs  
MachineState_FFd2 
                  ...X.XXX..........................XXX... 7       
MachineState_FFd3 
                  ...X.XXX..........................XXX... 7       
F1HzEnable        .X...XXX...........................X.... 5       
MachineState_FFd1 
                  .....XXX...........................X.... 4       
MuxDisplInstance/SelCnt<0> 
                  ..X................................X.... 2       
MuxDisplInstance/SelCnt<1> 
                  ..X.....X..........................X.... 3       
MuxDisplInstance/Tetr<3> 
                  ....X...XX...X...X...X...X...X...X...... 9       
MuxDisplInstance/Tetr<2> 
                  ....X...XX..X...X...X...X...X...X....... 9       
Clr               X....XXX...........................X.... 5       
MuxDisplInstance/Tetr<1> 
                  ....X...XX.X...X...X...X...X...X........ 9       
HzRange           .....XXX...........................X.... 4       
MuxDisplInstance/Tetr<0> 
                  ....X...XXX...X...X...X...X...X......... 9       
MuxDisplInstance/Blank 
                  ....X...XXXXXXXXXXXXXXXXXXXXXX.......... 23      
                 0----+----1----+----2----+----3----+----4
                           0         0         0         0
*********************************** FB5  ***********************************
This function block is part of I/O Bank number:               1
Number of function block inputs used/remaining:               35/5
Number of function block control terms used/remaining:        3/1
Number of PLA product terms used/remaining:                   37/19
Signal                        Total Loc     Pin  Pin     Pin   CTC CTR CTS CTE
Name                          Pt            No.  Type    Use   
Cnt10<1>                      5     FB5_1        (b)     (b)    +   +      
R10<3>                        3     FB5_2   33   I/O     (b)               
Cnt10<2>                      3     FB5_3        (b)     (b)    +   +      
R10<2>                        3     FB5_4   32   GCK/I/O (b)               
R10<1>                        3     FB5_5   31   I/O     (b)               
R10<0>                        3     FB5_6   30   GCK/I/O (b)               
Cnt1<3>                       4     FB5_7        (b)     (b)    +   +      
Cnt10<0>                      3     FB5_8        (b)     (b)    +   +      
Cnt1<1>                       4     FB5_9        (b)     (b)    +   +      
Cnt1<2>                       3     FB5_10       (b)     (b)    +   +      
Cnt1<0>                       3     FB5_11       (b)     (b)    +   +      
F1HzCnt<9>                    3     FB5_12       (b)     (b)            +  
F1HzCnt<19>                   3     FB5_13       (b)     (b)            +  
Cnt10<3>                      4     FB5_14  28   I/O     (b)    +   +      
F1HzCnt<18>                   3     FB5_15       (b)     (b)            +  
F1HzCnt<6>                    9     FB5_16       (b)     (b)            +  

Signals Used by Logic in Function Block
  1: Cnt10<0>          13: F1HzCnt<13>       25: F1HzCnt<6> 
  2: Cnt10<1>          14: F1HzCnt<14>       26: F1HzCnt<7> 
  3: Cnt10<2>          15: F1HzCnt<15>       27: F1HzCnt<8> 
  4: Cnt10<3>          16: F1HzCnt<16>       28: F1HzCnt<9> 
  5: Cnt1<0>           17: F1HzCnt<17>       29: F1HzEnable 
  6: Cnt1<1>           18: F1HzCnt<18>       30: FInp 
  7: Cnt1<2>           19: F1HzCnt<19>       31: GoKInstance/ShRegister<0>.COMB 
  8: Cnt1<3>           20: F1HzCnt<1>        32: MachineState_FFd1 
  9: F1HzCnt<0>        21: F1HzCnt<2>        33: MachineState_FFd2 
 10: F1HzCnt<10>       22: F1HzCnt<3>        34: Reset 
 11: F1HzCnt<11>       23: F1HzCnt<4>        35: RunLed 
 12: F1HzCnt<12>       24: F1HzCnt<5>       

Signal                     1         2         3         4 FB      
Name             0----+----0----+----0----+----0----+----0 Inputs  
Cnt10<1>          XXXXXXXX.....................XX...X..... 11      
R10<3>            ...X...........................XXX...... 4       
Cnt10<2>          XX..XXXX.....................XX...X..... 9       
R10<2>            ..X............................XXX...... 4       
R10<1>            .X.............................XXX...... 4       
R10<0>            X..............................XXX...... 4       
Cnt1<3>           ....XXXX.....................XX...X..... 7       
Cnt10<0>          ....XXXX.....................XX...X..... 7       
Cnt1<1>           ....XXXX.....................XX...X..... 7       
Cnt1<2>           ....XX.......................XX...X..... 5       
Cnt1<0>           .............................XX...X..... 3       
F1HzCnt<9>        ........XXXXXXXXXXXXXXXXXXXXX.X......... 22      
F1HzCnt<19>       ........XXXXXXXXXXXXXXXXXXXXX.X......... 22      
Cnt10<3>          XXXXXXXX.....................XX...X..... 11      
F1HzCnt<18>       ........XXXXXXXXXXXXXXXXXXXXX.X......... 22      
F1HzCnt<6>        ........XXXXXXXXXXXXXXXXXXXXX.X......... 22      
                 0----+----1----+----2----+----3----+----4
                           0         0         0         0
*********************************** FB6  ***********************************
This function block is part of I/O Bank number:               1
Number of function block inputs used/remaining:               19/21
Number of function block control terms used/remaining:        1/3
Number of PLA product terms used/remaining:                   33/23
Signal                        Total Loc     Pin  Pin     Pin   CTC CTR CTS CTE
Name                          Pt            No.  Type    Use   
R100<3>                       3     FB6_1   34   I/O     (b)        +      
R100<2>                       3     FB6_2   35   CDR/I/O (b)        +      
R10000<3>                     3     FB6_3        (b)     (b)        +      
R100<1>                       3     FB6_4   38   GCK/I/O GCK        +      
R10000<2>                     3     FB6_5        (b)     (b)        +      
R10000<1>                     3     FB6_6        (b)     (b)        +      
R10000<0>                     3     FB6_7        (b)     (b)        +      
R100000<3>                    3     FB6_8        (b)     (b)        +      
R100000<2>                    3     FB6_9        (b)     (b)        +      
R100000<1>                    3     FB6_10       (b)     (b)        +      
R100000<0>                    3     FB6_11       (b)     (b)        +      
R100<0>                       3     FB6_12  39   DGE/I/O I          +      
R1000<3>                      3     FB6_13  40   I/O     (b)        +      
R1000<2>                      3     FB6_14  41   I/O     (b)        +      
R1000<1>                      3     FB6_15  42   I/O     (b)        +      
R1000<0>                      3     FB6_16  43   I/O     (b)        +      

Signals Used by Logic in Function Block
  1: Cnt100000<0>       8: Cnt10000<3>       14: Cnt100<1> 
  2: Cnt100000<1>       9: Cnt1000<0>        15: Cnt100<2> 
  3: Cnt100000<2>      10: Cnt1000<1>        16: Cnt100<3> 
  4: Cnt100000<3>      11: Cnt1000<2>        17: MachineState_FFd1 
  5: Cnt10000<0>       12: Cnt1000<3>        18: MachineState_FFd2 
  6: Cnt10000<1>       13: Cnt100<0>         19: Reset 
  7: Cnt10000<2>      

Signal                     1         2         3         4 FB      
Name             0----+----0----+----0----+----0----+----0 Inputs  
R100<3>           ...............XXXX..................... 4       
R100<2>           ..............X.XXX..................... 4       
R10000<3>         .......X........XXX..................... 4       
R100<1>           .............X..XXX..................... 4       
R10000<2>         ......X.........XXX..................... 4       
R10000<1>         .....X..........XXX..................... 4       
R10000<0>         ....X...........XXX..................... 4       
R100000<3>        ...X............XXX..................... 4       
R100000<2>        ..X.............XXX..................... 4       
R100000<1>        .X..............XXX..................... 4       
R100000<0>        X...............XXX..................... 4       
R100<0>           ............X...XXX..................... 4       
R1000<3>          ...........X....XXX..................... 4       
R1000<2>          ..........X.....XXX..................... 4       
R1000<1>          .........X......XXX..................... 4       
R1000<0>          ........X.......XXX..................... 4       
                 0----+----1----+----2----+----3----+----4
                           0         0         0         0
*********************************** FB7  ***********************************
This function block is part of I/O Bank number:               1
Number of function block inputs used/remaining:               15/25
Number of function block control terms used/remaining:        2/2
Number of PLA product terms used/remaining:                   15/41
Signal                        Total Loc     Pin  Pin     Pin   CTC CTR CTS CTE
Name                          Pt            No.  Type    Use   
R1<3>                         3     FB7_1        (b)     (b)        +      
R1<2>                         3     FB7_2        (b)     (b)        +      
R1<1>                         3     FB7_3        (b)     (b)        +      
R1<0>                         3     FB7_4        (b)     (b)        +      
(unused)                      0     FB7_5   26   I/O           
(unused)                      0     FB7_6   25   I/O           
FDiv<0>                       2     FB7_7        (b)     (b)    +   +      
FDiv<1>                       3     FB7_8        (b)     (b)    +   +      
FDiv<2>                       3     FB7_9        (b)     (b)    +   +      
FDiv<3>                       3     FB7_10       (b)     (b)    +   +      
(unused)                      0     FB7_11  24   I/O           
(unused)                      0     FB7_12  23   I/O           
(unused)                      0     FB7_13  22   I/O           
(unused)                      0     FB7_14  21   I/O           
(unused)                      0     FB7_15  20   I/O           
RangeKeyStatus                2     FB7_16  19   I/O     (b)               

Signals Used by Logic in Function Block
  1: Cnt1<0>            6: FDiv<0>            11: RangeKInstance/ShRegister<0> 
  2: Cnt1<1>            7: FDiv<1>            12: RangeKInstance/ShRegister<1> 
  3: Cnt1<2>            8: FDiv<2>            13: RangeKInstance/ShRegister<2> 
  4: Cnt1<3>            9: MachineState_FFd1  14: RangeKInstance/ShRegister<3> 
  5: FClk              10: MachineState_FFd2  15: Reset 

Signal                     1         2         3         4 FB      
Name             0----+----0----+----0----+----0----+----0 Inputs  
R1<3>             ...X....XX....X......................... 4       
R1<2>             ..X.....XX....X......................... 4       
R1<1>             .X......XX....X......................... 4       
R1<0>             X.......XX....X......................... 4       
FDiv<0>           ....X.........X......................... 2       
FDiv<1>           ....XX........X......................... 3       
FDiv<2>           ....XXX.......X......................... 4       
FDiv<3>           ....XXXX......X......................... 5       
RangeKeyStatus    ..........XXXX.......................... 4       
                 0----+----1----+----2----+----3----+----4
                           0         0         0         0
*********************************** FB8  ***********************************
This function block is part of I/O Bank number:               1
Number of function block inputs used/remaining:               0/40
Number of function block control terms used/remaining:        0/4
Number of PLA product terms used/remaining:                   0/56
Signal                        Total Loc     Pin  Pin     Pin   CTC CTR CTS CTE
Name                          Pt            No.  Type    Use   
(unused)                      0     FB8_1   44   I/O           
(unused)                      0     FB8_2   45   I/O           
(unused)                      0     FB8_3   46   I/O           
(unused)                      0     FB8_4        (b)           
(unused)                      0     FB8_5   48   I/O           
(unused)                      0     FB8_6   49   I/O           
(unused)                      0     FB8_7        (b)           
(unused)                      0     FB8_8        (b)           
(unused)                      0     FB8_9        (b)           
(unused)                      0     FB8_10       (b)           
(unused)                      0     FB8_11  50   I/O           
(unused)                      0     FB8_12  51   I/O           
(unused)                      0     FB8_13  52   I/O           
(unused)                      0     FB8_14       (b)           
(unused)                      0     FB8_15       (b)           
(unused)                      0     FB8_16       (b)           
*********************************** FB9  ***********************************
This function block is part of I/O Bank number:               2
Number of function block inputs used/remaining:               0/40
Number of function block control terms used/remaining:        0/4
Number of PLA product terms used/remaining:                   0/56
Signal                        Total Loc     Pin  Pin     Pin   CTC CTR CTS CTE
Name                          Pt            No.  Type    Use   
(unused)                      0     FB9_1   112  I/O           
(unused)                      0     FB9_2   113  I/O           
(unused)                      0     FB9_3        (b)           
(unused)                      0     FB9_4   114  I/O           
(unused)                      0     FB9_5        (b)           
(unused)                      0     FB9_6   115  I/O           
(unused)                      0     FB9_7        (b)           
(unused)                      0     FB9_8        (b)           
(unused)                      0     FB9_9        (b)           
(unused)                      0     FB9_10       (b)           
(unused)                      0     FB9_11       (b)           
(unused)                      0     FB9_12  116  I/O           
(unused)                      0     FB9_13  117  I/O           
(unused)                      0     FB9_14  118  I/O           
(unused)                      0     FB9_15  119  I/O           
(unused)                      0     FB9_16       (b)           
*********************************** FB10 ***********************************
This function block is part of I/O Bank number:               2
Number of function block inputs used/remaining:               0/40
Number of function block control terms used/remaining:        0/4
Number of PLA product terms used/remaining:                   0/56
Signal                        Total Loc     Pin  Pin     Pin   CTC CTR CTS CTE
Name                          Pt            No.  Type    Use   
(unused)                      0     FB10_1  111  I/O           
(unused)                      0     FB10_2  110  I/O           
(unused)                      0     FB10_3  107  I/O           
(unused)                      0     FB10_4  106  I/O           
(unused)                      0     FB10_5  105  I/O           
(unused)                      0     FB10_6  104  I/O           
(unused)                      0     FB10_7       (b)           
(unused)                      0     FB10_8       (b)           
(unused)                      0     FB10_9       (b)           
(unused)                      0     FB10_10      (b)           
(unused)                      0     FB10_11      (b)           
(unused)                      0     FB10_12 103  I/O           
(unused)                      0     FB10_13      (b)           
(unused)                      0     FB10_14 102  I/O           
(unused)                      0     FB10_15      (b)           
(unused)                      0     FB10_16 101  I/O           
*********************************** FB11 ***********************************
This function block is part of I/O Bank number:               2
Number of function block inputs used/remaining:               2/38
Number of function block control terms used/remaining:        0/4
Number of PLA product terms used/remaining:                   4/52
Signal                        Total Loc     Pin  Pin     Pin   CTC CTR CTS CTE
Name                          Pt            No.  Type    Use   
(unused)                      0     FB11_1       (b)           
(unused)                      0     FB11_2       (b)           
(unused)                      0     FB11_3       (b)           
(unused)                      0     FB11_4       (b)           
(unused)                      0     FB11_5  120  I/O           
(unused)                      0     FB11_6  121  I/O           
(unused)                      0     FB11_7       (b)           
(unused)                      0     FB11_8       (b)           
(unused)                      0     FB11_9       (b)           
(unused)                      0     FB11_10      (b)           
(unused)                      0     FB11_11 124  I/O           
(unused)                      0     FB11_12 125  I/O           
DSel0                         1     FB11_13 126  I/O     O                 
DSel1                         1     FB11_14 128  I/O     O                 
DSel2                         1     FB11_15 129  I/O     O                 
DSel3                         1     FB11_16 130  I/O     O                 

Signals Used by Logic in Function Block
  1: MuxDisplInstance/SelCnt<0>   2: MuxDisplInstance/SelCnt<1> 

Signal                     1         2         3         4 FB      
Name             0----+----0----+----0----+----0----+----0 Inputs  
DSel0             XX...................................... 2       
DSel1             XX...................................... 2       
DSel2             XX...................................... 2       
DSel3             XX...................................... 2       
                 0----+----1----+----2----+----3----+----4
                           0         0         0         0
*********************************** FB12 ***********************************
This function block is part of I/O Bank number:               2
Number of function block inputs used/remaining:               2/38
Number of function block control terms used/remaining:        2/2
Number of PLA product terms used/remaining:                   2/54
Signal                        Total Loc     Pin  Pin     Pin   CTC CTR CTS CTE
Name                          Pt            No.  Type    Use   
(unused)                      0     FB12_1       (b)           
(unused)                      0     FB12_2  100  I/O           
(unused)                      0     FB12_3       (b)           
(unused)                      0     FB12_4       (b)           
(unused)                      0     FB12_5       (b)           
(unused)                      0     FB12_6       (b)           
(unused)                      0     FB12_7       (b)           
(unused)                      0     FB12_8       (b)           
(unused)                      0     FB12_9       (b)           
(unused)                      0     FB12_10      (b)           
(unused)                      0     FB12_11 98   I/O           
(unused)                      0     FB12_12 97   I/O           
(unused)                      0     FB12_13 96   I/O           
(unused)                      0     FB12_14 95   I/O           
RangeKInstance/ShRegister<0>  2     FB12_15 94   I/O     I      +       +  
(unused)                      0     FB12_16      (b)           

Signals Used by Logic in Function Block
  1: FDiv<2>            2: Reset            

Signal                     1         2         3         4 FB      
Name             0----+----0----+----0----+----0----+----0 Inputs  
                 0----+----1----+----2----+----3----+----4
                           0         0         0         0
*********************************** FB13 ***********************************
This function block is part of I/O Bank number:               1
Number of function block inputs used/remaining:               0/40
Number of function block control terms used/remaining:        0/4
Number of PLA product terms used/remaining:                   0/56
Signal                        Total Loc     Pin  Pin     Pin   CTC CTR CTS CTE
Name                          Pt            No.  Type    Use   
(unused)                      0     FB13_1  75   I/O           
(unused)                      0     FB13_2  76   I/O           
(unused)                      0     FB13_3  77   I/O           
(unused)                      0     FB13_4       (b)           
(unused)                      0     FB13_5  78   I/O           
(unused)                      0     FB13_6  79   I/O           
(unused)                      0     FB13_7       (b)           
(unused)                      0     FB13_8       (b)           
(unused)                      0     FB13_9       (b)           
(unused)                      0     FB13_10      (b)           
(unused)                      0     FB13_11      (b)           
(unused)                      0     FB13_12 80   I/O           
(unused)                      0     FB13_13 81   I/O           
(unused)                      0     FB13_14 82   I/O           
(unused)                      0     FB13_15      (b)           
(unused)                      0     FB13_16      (b)           
*********************************** FB14 ***********************************
This function block is part of I/O Bank number:               1
Number of function block inputs used/remaining:               8/32
Number of function block control terms used/remaining:        2/2
Number of PLA product terms used/remaining:                   7/49
Signal                        Total Loc     Pin  Pin     Pin   CTC CTR CTS CTE
Name                          Pt            No.  Type    Use   
(unused)                      0     FB14_1  74   I/O           
(unused)                      0     FB14_2  71   I/O           
(unused)                      0     FB14_3  70   I/O           
RunLed                        3     FB14_4  69   I/O     O      +       +  
(unused)                      0     FB14_5       (b)           
(unused)                      0     FB14_6  68   I/O           
(unused)                      0     FB14_7       (b)           
(unused)                      0     FB14_8       (b)           
(unused)                      0     FB14_9       (b)           
(unused)                      0     FB14_10      (b)           
(unused)                      0     FB14_11      (b)           
(unused)                      0     FB14_12      (b)           
(unused)                      0     FB14_13 66   I/O           
(unused)                      0     FB14_14 64   I/O           
(unused)                      0     FB14_15      (b)           
Seg_G                         4     FB14_16 61   I/O     O                 

Signals Used by Logic in Function Block
  1: F1HzCnt<19>                      4: MuxDisplInstance/Blank     7: MuxDisplInstance/Tetr<2> 
  2: F1HzEnable                       5: MuxDisplInstance/Tetr<0>   8: MuxDisplInstance/Tetr<3> 
  3: GoKInstance/ShRegister<0>.COMB   6: MuxDisplInstance/Tetr<1> 

Signal                     1         2         3         4 FB      
Name             0----+----0----+----0----+----0----+----0 Inputs  
RunLed            XXX..................................... 3       
Seg_G             ...XXXXX................................ 5       
                 0----+----1----+----2----+----3----+----4
                           0         0         0         0
*********************************** FB15 ***********************************
This function block is part of I/O Bank number:               1
Number of function block inputs used/remaining:               0/40
Number of function block control terms used/remaining:        0/4
Number of PLA product terms used/remaining:                   0/56
Signal                        Total Loc     Pin  Pin     Pin   CTC CTR CTS CTE
Name                          Pt            No.  Type    Use   
(unused)                      0     FB15_1       (b)           
(unused)                      0     FB15_2  83   I/O           
(unused)                      0     FB15_3       (b)           
(unused)                      0     FB15_4       (b)           
(unused)                      0     FB15_5       (b)           
(unused)                      0     FB15_6       (b)           
(unused)                      0     FB15_7       (b)           
(unused)                      0     FB15_8       (b)           
(unused)                      0     FB15_9       (b)           
(unused)                      0     FB15_10      (b)           
(unused)                      0     FB15_11 85   I/O           
(unused)                      0     FB15_12 86   I/O           
(unused)                      0     FB15_13 87   I/O           
(unused)                      0     FB15_14 88   I/O           
(unused)                      0     FB15_15 91   I/O           
(unused)                      0     FB15_16 92   I/O           
*********************************** FB16 ***********************************
This function block is part of I/O Bank number:               1
Number of function block inputs used/remaining:               8/32
Number of function block control terms used/remaining:        0/4
Number of PLA product terms used/remaining:                   23/33
Signal                        Total Loc     Pin  Pin     Pin   CTC CTR CTS CTE
Name                          Pt            No.  Type    Use   
(unused)                      0     FB16_1       (b)           
(unused)                      0     FB16_2       (b)           
(unused)                      0     FB16_3       (b)           
(unused)                      0     FB16_4       (b)           
Seg_C                         4     FB16_5  60   I/O     O                 
Seg_K                         2     FB16_6  59   I/O     O                 
(unused)                      0     FB16_7       (b)           
(unused)                      0     FB16_8       (b)           
(unused)                      0     FB16_9       (b)           
(unused)                      0     FB16_10      (b)           
Seg_D                         5     FB16_11 58   I/O     O                 
Seg_E                         4     FB16_12 57   I/O     O                 
Seg_A                         5     FB16_13 56   I/O     O                 
(unused)                      0     FB16_14      (b)           
Seg_F                         4     FB16_15 54   I/O     O                 
Seg_B                         4     FB16_16 53   I/O     O                 

Signals Used by Logic in Function Block
  1: HzRange                      4: MuxDisplInstance/SelCnt<1>   7: MuxDisplInstance/Tetr<2> 
  2: MuxDisplInstance/Blank       5: MuxDisplInstance/Tetr<0>     8: MuxDisplInstance/Tetr<3> 
  3: MuxDisplInstance/SelCnt<0>   6: MuxDisplInstance/Tetr<1>   

Signal                     1         2         3         4 FB      
Name             0----+----0----+----0----+----0----+----0 Inputs  
Seg_C             .X..XXXX................................ 5       
Seg_K             X.XX.................................... 3       
Seg_D             .X..XXXX................................ 5       
Seg_E             .X..XXXX................................ 5       
Seg_A             .X..XXXX................................ 5       
Seg_F             .X..XXXX................................ 5       
Seg_B             .X..XXXX................................ 5       
                 0----+----1----+----2----+----3----+----4
                           0         0         0         0
*******************************  Equations  ********************************

********** Mapped Logic **********

FDCPE_Clr: FDCPE port map (Clr,Clr_D,NOT Clk,'0','0','1');
Clr_D <= NOT (((NOT Reset AND NOT Clr)
	OR (Reset AND NOT MachineState_FFd1 AND MachineState_FFd3 AND 
	NOT MachineState_FFd2)));

FTCPE_Cnt1000000: FTCPE port map (Cnt100000(0),Cnt100000_T(0),FInp,NOT GoKInstance/ShRegister(0).COMB,'0','1');
Cnt100000_T(0) <= (NOT RunLed AND Cnt1000(3) AND Cnt1000(0) AND Cnt100(0) AND 
	Cnt10(0) AND Cnt1(0) AND NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3) AND 
	NOT Cnt10(1) AND NOT Cnt10(2) AND Cnt10(3) AND NOT Cnt100(1) AND NOT Cnt100(2) AND 
	Cnt100(3) AND NOT Cnt1000(1) AND NOT Cnt1000(2) AND Cnt10000(0) AND 
	NOT Cnt10000(1) AND NOT Cnt10000(2) AND Cnt10000(3));

FTCPE_Cnt1000001: FTCPE port map (Cnt100000(1),Cnt100000_T(1),FInp,NOT GoKInstance/ShRegister(0).COMB,'0','1');
Cnt100000_T(1) <= ((NOT RunLed AND Cnt1000(3) AND Cnt1000(0) AND Cnt100(0) AND 
	Cnt10(0) AND Cnt1(0) AND NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3) AND 
	NOT Cnt10(1) AND NOT Cnt10(2) AND Cnt10(3) AND NOT Cnt100(1) AND NOT Cnt100(2) AND 
	Cnt100(3) AND NOT Cnt1000(1) AND NOT Cnt1000(2) AND NOT Cnt100000(3) AND 
	Cnt10000(0) AND Cnt100000(0) AND NOT Cnt10000(1) AND NOT Cnt10000(2) AND 
	Cnt10000(3))
	OR (NOT RunLed AND Cnt1000(3) AND Cnt1000(0) AND Cnt100(0) AND 
	Cnt10(0) AND Cnt1(0) AND NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3) AND 
	NOT Cnt10(1) AND NOT Cnt10(2) AND Cnt10(3) AND NOT Cnt100(1) AND NOT Cnt100(2) AND 
	Cnt100(3) AND NOT Cnt1000(1) AND NOT Cnt1000(2) AND Cnt10000(0) AND 
	Cnt100000(0) AND NOT Cnt10000(1) AND NOT Cnt10000(2) AND Cnt10000(3) AND 
	Cnt100000(1))
	OR (NOT RunLed AND Cnt1000(3) AND Cnt1000(0) AND Cnt100(0) AND 
	Cnt10(0) AND Cnt1(0) AND NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3) AND 
	NOT Cnt10(1) AND NOT Cnt10(2) AND Cnt10(3) AND NOT Cnt100(1) AND NOT Cnt100(2) AND 
	Cnt100(3) AND NOT Cnt1000(1) AND NOT Cnt1000(2) AND Cnt10000(0) AND 
	Cnt100000(0) AND NOT Cnt10000(1) AND NOT Cnt10000(2) AND Cnt10000(3) AND 
	Cnt100000(2)));

FTCPE_Cnt1000002: FTCPE port map (Cnt100000(2),Cnt100000_T(2),FInp,NOT GoKInstance/ShRegister(0).COMB,'0','1');
Cnt100000_T(2) <= (NOT RunLed AND Cnt1000(3) AND Cnt1000(0) AND Cnt100(0) AND 
	Cnt10(0) AND Cnt1(0) AND NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3) AND 
	NOT Cnt10(1) AND NOT Cnt10(2) AND Cnt10(3) AND NOT Cnt100(1) AND NOT Cnt100(2) AND 
	Cnt100(3) AND NOT Cnt1000(1) AND NOT Cnt1000(2) AND Cnt10000(0) AND 
	Cnt100000(0) AND NOT Cnt10000(1) AND NOT Cnt10000(2) AND Cnt10000(3) AND 
	Cnt100000(1));

FTCPE_Cnt1000003: FTCPE port map (Cnt100000(3),Cnt100000_T(3),FInp,NOT GoKInstance/ShRegister(0).COMB,'0','1');
Cnt100000_T(3) <= ((NOT RunLed AND Cnt1000(3) AND Cnt1000(0) AND Cnt100(0) AND 
	Cnt10(0) AND Cnt1(0) AND NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3) AND 
	NOT Cnt10(1) AND NOT Cnt10(2) AND Cnt10(3) AND NOT Cnt100(1) AND NOT Cnt100(2) AND 
	Cnt100(3) AND NOT Cnt1000(1) AND NOT Cnt1000(2) AND Cnt10000(0) AND 
	Cnt100000(0) AND NOT Cnt10000(1) AND NOT Cnt10000(2) AND Cnt10000(3) AND 
	Cnt100000(1) AND Cnt100000(2))
	OR (NOT RunLed AND Cnt1000(3) AND Cnt1000(0) AND Cnt100(0) AND 
	Cnt10(0) AND Cnt1(0) AND NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3) AND 
	NOT Cnt10(1) AND NOT Cnt10(2) AND Cnt10(3) AND NOT Cnt100(1) AND NOT Cnt100(2) AND 
	Cnt100(3) AND NOT Cnt1000(1) AND NOT Cnt1000(2) AND Cnt100000(3) AND 
	Cnt10000(0) AND Cnt100000(0) AND NOT Cnt10000(1) AND NOT Cnt10000(2) AND 
	Cnt10000(3) AND NOT Cnt100000(1) AND NOT Cnt100000(2)));

FTCPE_Cnt100000: FTCPE port map (Cnt10000(0),Cnt10000_T(0),FInp,NOT GoKInstance/ShRegister(0).COMB,'0','1');
Cnt10000_T(0) <= (NOT RunLed AND Cnt1000(3) AND Cnt1000(0) AND Cnt100(0) AND 
	Cnt10(0) AND Cnt1(0) AND NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3) AND 
	NOT Cnt10(1) AND NOT Cnt10(2) AND Cnt10(3) AND NOT Cnt100(1) AND NOT Cnt100(2) AND 
	Cnt100(3) AND NOT Cnt1000(1) AND NOT Cnt1000(2));

FTCPE_Cnt100001: FTCPE port map (Cnt10000(1),Cnt10000_T(1),FInp,NOT GoKInstance/ShRegister(0).COMB,'0','1');
Cnt10000_T(1) <= ((NOT RunLed AND Cnt1000(3) AND Cnt1000(0) AND Cnt100(0) AND 
	Cnt10(0) AND Cnt1(0) AND NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3) AND 
	NOT Cnt10(1) AND NOT Cnt10(2) AND Cnt10(3) AND NOT Cnt100(1) AND NOT Cnt100(2) AND 
	Cnt100(3) AND NOT Cnt1000(1) AND NOT Cnt1000(2) AND Cnt10000(0) AND 
	Cnt10000(1))
	OR (NOT RunLed AND Cnt1000(3) AND Cnt1000(0) AND Cnt100(0) AND 
	Cnt10(0) AND Cnt1(0) AND NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3) AND 
	NOT Cnt10(1) AND NOT Cnt10(2) AND Cnt10(3) AND NOT Cnt100(1) AND NOT Cnt100(2) AND 
	Cnt100(3) AND NOT Cnt1000(1) AND NOT Cnt1000(2) AND Cnt10000(0) AND 
	Cnt10000(2))
	OR (NOT RunLed AND Cnt1000(3) AND Cnt1000(0) AND Cnt100(0) AND 
	Cnt10(0) AND Cnt1(0) AND NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3) AND 
	NOT Cnt10(1) AND NOT Cnt10(2) AND Cnt10(3) AND NOT Cnt100(1) AND NOT Cnt100(2) AND 
	Cnt100(3) AND NOT Cnt1000(1) AND NOT Cnt1000(2) AND Cnt10000(0) AND 
	NOT Cnt10000(3)));

FTCPE_Cnt100002: FTCPE port map (Cnt10000(2),Cnt10000_T(2),FInp,NOT GoKInstance/ShRegister(0).COMB,'0','1');
Cnt10000_T(2) <= (NOT RunLed AND Cnt1000(3) AND Cnt1000(0) AND Cnt100(0) AND 
	Cnt10(0) AND Cnt1(0) AND NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3) AND 
	NOT Cnt10(1) AND NOT Cnt10(2) AND Cnt10(3) AND NOT Cnt100(1) AND NOT Cnt100(2) AND 
	Cnt100(3) AND NOT Cnt1000(1) AND NOT Cnt1000(2) AND Cnt10000(0) AND 
	Cnt10000(1));

FTCPE_Cnt100003: FTCPE port map (Cnt10000(3),Cnt10000_T(3),FInp,NOT GoKInstance/ShRegister(0).COMB,'0','1');
Cnt10000_T(3) <= ((NOT RunLed AND Cnt1000(3) AND Cnt1000(0) AND Cnt100(0) AND 
	Cnt10(0) AND Cnt1(0) AND NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3) AND 
	NOT Cnt10(1) AND NOT Cnt10(2) AND Cnt10(3) AND NOT Cnt100(1) AND NOT Cnt100(2) AND 
	Cnt100(3) AND NOT Cnt1000(1) AND NOT Cnt1000(2) AND Cnt10000(0) AND 
	Cnt10000(1) AND Cnt10000(2))
	OR (NOT RunLed AND Cnt1000(3) AND Cnt1000(0) AND Cnt100(0) AND 
	Cnt10(0) AND Cnt1(0) AND NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3) AND 
	NOT Cnt10(1) AND NOT Cnt10(2) AND Cnt10(3) AND NOT Cnt100(1) AND NOT Cnt100(2) AND 
	Cnt100(3) AND NOT Cnt1000(1) AND NOT Cnt1000(2) AND Cnt10000(0) AND 
	NOT Cnt10000(1) AND NOT Cnt10000(2) AND Cnt10000(3)));

FTCPE_Cnt10000: FTCPE port map (Cnt1000(0),Cnt1000_T(0),FInp,NOT GoKInstance/ShRegister(0).COMB,'0','1');
Cnt1000_T(0) <= (NOT RunLed AND Cnt100(0) AND Cnt10(0) AND Cnt1(0) AND 
	NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3) AND NOT Cnt10(1) AND NOT Cnt10(2) AND 
	Cnt10(3) AND NOT Cnt100(1) AND NOT Cnt100(2) AND Cnt100(3));

FTCPE_Cnt10001: FTCPE port map (Cnt1000(1),Cnt1000_T(1),FInp,NOT GoKInstance/ShRegister(0).COMB,'0','1');
Cnt1000_T(1) <= ((NOT RunLed AND NOT Cnt1000(3) AND Cnt1000(0) AND Cnt100(0) AND 
	Cnt10(0) AND Cnt1(0) AND NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3) AND 
	NOT Cnt10(1) AND NOT Cnt10(2) AND Cnt10(3) AND NOT Cnt100(1) AND NOT Cnt100(2) AND 
	Cnt100(3))
	OR (NOT RunLed AND Cnt1000(0) AND Cnt100(0) AND Cnt10(0) AND 
	Cnt1(0) AND NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3) AND NOT Cnt10(1) AND 
	NOT Cnt10(2) AND Cnt10(3) AND NOT Cnt100(1) AND NOT Cnt100(2) AND Cnt100(3) AND 
	Cnt1000(1))
	OR (NOT RunLed AND Cnt1000(0) AND Cnt100(0) AND Cnt10(0) AND 
	Cnt1(0) AND NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3) AND NOT Cnt10(1) AND 
	NOT Cnt10(2) AND Cnt10(3) AND NOT Cnt100(1) AND NOT Cnt100(2) AND Cnt100(3) AND 
	Cnt1000(2)));

FTCPE_Cnt10002: FTCPE port map (Cnt1000(2),Cnt1000_T(2),FInp,NOT GoKInstance/ShRegister(0).COMB,'0','1');
Cnt1000_T(2) <= (NOT RunLed AND Cnt1000(0) AND Cnt100(0) AND Cnt10(0) AND 
	Cnt1(0) AND NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3) AND NOT Cnt10(1) AND 
	NOT Cnt10(2) AND Cnt10(3) AND NOT Cnt100(1) AND NOT Cnt100(2) AND Cnt100(3) AND 
	Cnt1000(1));

FTCPE_Cnt10003: FTCPE port map (Cnt1000(3),Cnt1000_T(3),FInp,NOT GoKInstance/ShRegister(0).COMB,'0','1');
Cnt1000_T(3) <= ((NOT RunLed AND Cnt1000(0) AND Cnt100(0) AND Cnt10(0) AND 
	Cnt1(0) AND NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3) AND NOT Cnt10(1) AND 
	NOT Cnt10(2) AND Cnt10(3) AND NOT Cnt100(1) AND NOT Cnt100(2) AND Cnt100(3) AND 
	Cnt1000(1) AND Cnt1000(2))
	OR (NOT RunLed AND Cnt1000(3) AND Cnt1000(0) AND Cnt100(0) AND 
	Cnt10(0) AND Cnt1(0) AND NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3) AND 
	NOT Cnt10(1) AND NOT Cnt10(2) AND Cnt10(3) AND NOT Cnt100(1) AND NOT Cnt100(2) AND 
	Cnt100(3) AND NOT Cnt1000(1) AND NOT Cnt1000(2)));

FTCPE_Cnt1000: FTCPE port map (Cnt100(0),Cnt100_T(0),FInp,NOT GoKInstance/ShRegister(0).COMB,'0','1');
Cnt100_T(0) <= (NOT RunLed AND Cnt10(0) AND Cnt1(0) AND NOT Cnt1(1) AND 
	NOT Cnt1(2) AND Cnt1(3) AND NOT Cnt10(1) AND NOT Cnt10(2) AND Cnt10(3));

FTCPE_Cnt1001: FTCPE port map (Cnt100(1),Cnt100_T(1),FInp,NOT GoKInstance/ShRegister(0).COMB,'0','1');
Cnt100_T(1) <= ((NOT RunLed AND Cnt100(0) AND Cnt10(0) AND Cnt1(0) AND 
	NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3) AND NOT Cnt10(1) AND NOT Cnt10(2) AND 
	Cnt10(3) AND Cnt100(1))
	OR (NOT RunLed AND Cnt100(0) AND Cnt10(0) AND Cnt1(0) AND 
	NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3) AND NOT Cnt10(1) AND NOT Cnt10(2) AND 
	Cnt10(3) AND Cnt100(2))
	OR (NOT RunLed AND Cnt100(0) AND Cnt10(0) AND Cnt1(0) AND 
	NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3) AND NOT Cnt10(1) AND NOT Cnt10(2) AND 
	Cnt10(3) AND NOT Cnt100(3)));

FTCPE_Cnt1002: FTCPE port map (Cnt100(2),Cnt100_T(2),FInp,NOT GoKInstance/ShRegister(0).COMB,'0','1');
Cnt100_T(2) <= (NOT RunLed AND Cnt100(0) AND Cnt10(0) AND Cnt1(0) AND 
	NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3) AND NOT Cnt10(1) AND NOT Cnt10(2) AND 
	Cnt10(3) AND Cnt100(1));

FTCPE_Cnt1003: FTCPE port map (Cnt100(3),Cnt100_T(3),FInp,NOT GoKInstance/ShRegister(0).COMB,'0','1');
Cnt100_T(3) <= ((NOT RunLed AND Cnt100(0) AND Cnt10(0) AND Cnt1(0) AND 
	NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3) AND NOT Cnt10(1) AND NOT Cnt10(2) AND 
	Cnt10(3) AND Cnt100(1) AND Cnt100(2))
	OR (NOT RunLed AND Cnt100(0) AND Cnt10(0) AND Cnt1(0) AND 
	NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3) AND NOT Cnt10(1) AND NOT Cnt10(2) AND 
	Cnt10(3) AND NOT Cnt100(1) AND NOT Cnt100(2) AND Cnt100(3)));

FTCPE_Cnt100: FTCPE port map (Cnt10(0),Cnt10_T(0),FInp,NOT GoKInstance/ShRegister(0).COMB,'0','1');
Cnt10_T(0) <= (NOT RunLed AND Cnt1(0) AND NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3));

FTCPE_Cnt101: FTCPE port map (Cnt10(1),Cnt10_T(1),FInp,NOT GoKInstance/ShRegister(0).COMB,'0','1');
Cnt10_T(1) <= ((NOT RunLed AND Cnt10(0) AND Cnt1(0) AND NOT Cnt1(1) AND 
	NOT Cnt1(2) AND Cnt1(3) AND Cnt10(1))
	OR (NOT RunLed AND Cnt10(0) AND Cnt1(0) AND NOT Cnt1(1) AND 
	NOT Cnt1(2) AND Cnt1(3) AND Cnt10(2))
	OR (NOT RunLed AND Cnt10(0) AND Cnt1(0) AND NOT Cnt1(1) AND 
	NOT Cnt1(2) AND Cnt1(3) AND NOT Cnt10(3)));

FTCPE_Cnt102: FTCPE port map (Cnt10(2),Cnt10_T(2),FInp,NOT GoKInstance/ShRegister(0).COMB,'0','1');
Cnt10_T(2) <= (NOT RunLed AND Cnt10(0) AND Cnt1(0) AND NOT Cnt1(1) AND 
	NOT Cnt1(2) AND Cnt1(3) AND Cnt10(1));

FTCPE_Cnt103: FTCPE port map (Cnt10(3),Cnt10_T(3),FInp,NOT GoKInstance/ShRegister(0).COMB,'0','1');
Cnt10_T(3) <= ((NOT RunLed AND Cnt10(0) AND Cnt1(0) AND NOT Cnt1(1) AND 
	NOT Cnt1(2) AND Cnt1(3) AND Cnt10(1) AND Cnt10(2))
	OR (NOT RunLed AND Cnt10(0) AND Cnt1(0) AND NOT Cnt1(1) AND 
	NOT Cnt1(2) AND Cnt1(3) AND NOT Cnt10(1) AND NOT Cnt10(2) AND Cnt10(3)));

FTCPE_Cnt10: FTCPE port map (Cnt1(0),NOT RunLed,FInp,NOT GoKInstance/ShRegister(0).COMB,'0','1');

FTCPE_Cnt11: FTCPE port map (Cnt1(1),Cnt1_T(1),FInp,NOT GoKInstance/ShRegister(0).COMB,'0','1');
Cnt1_T(1) <= (NOT RunLed AND Cnt1(0))
	XOR (NOT RunLed AND Cnt1(0) AND NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3));

FTCPE_Cnt12: FTCPE port map (Cnt1(2),Cnt1_T(2),FInp,NOT GoKInstance/ShRegister(0).COMB,'0','1');
Cnt1_T(2) <= (NOT RunLed AND Cnt1(0) AND Cnt1(1));

FTCPE_Cnt13: FTCPE port map (Cnt1(3),Cnt1_T(3),FInp,NOT GoKInstance/ShRegister(0).COMB,'0','1');
Cnt1_T(3) <= ((NOT RunLed AND Cnt1(0) AND Cnt1(1) AND Cnt1(2))
	OR (NOT RunLed AND Cnt1(0) AND NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3)));


DSel0 <= NOT ((NOT MuxDisplInstance/SelCnt(0) AND 
	NOT MuxDisplInstance/SelCnt(1)));


DSel1 <= NOT ((MuxDisplInstance/SelCnt(0) AND 
	NOT MuxDisplInstance/SelCnt(1)));


DSel2 <= NOT ((NOT MuxDisplInstance/SelCnt(0) AND 
	MuxDisplInstance/SelCnt(1)));


DSel3 <= NOT ((MuxDisplInstance/SelCnt(0) AND 
	MuxDisplInstance/SelCnt(1)));

FTCPE_F1HzCnt0: FTCPE port map (F1HzCnt(0),F1HzEnable,NOT Clk,'0',NOT GoKInstance/ShRegister(0).COMB,'1');

FTCPE_F1HzCnt1: FTCPE port map (F1HzCnt(1),F1HzCnt_T(1),NOT Clk,'0',NOT GoKInstance/ShRegister(0).COMB,'1');
F1HzCnt_T(1) <= (F1HzEnable AND F1HzCnt(0));

FTCPE_F1HzCnt2: FTCPE port map (F1HzCnt(2),F1HzCnt_T(2),NOT Clk,'0',NOT GoKInstance/ShRegister(0).COMB,'1');
F1HzCnt_T(2) <= (F1HzEnable AND F1HzCnt(0) AND F1HzCnt(1));

FTCPE_F1HzCnt3: FTCPE port map (F1HzCnt(3),F1HzCnt_T(3),NOT Clk,'0',NOT GoKInstance/ShRegister(0).COMB,'1');
F1HzCnt_T(3) <= (F1HzEnable AND F1HzCnt(0) AND F1HzCnt(1) AND 
	F1HzCnt(2));

FTCPE_F1HzCnt4: FTCPE port map (F1HzCnt(4),F1HzCnt_T(4),NOT Clk,'0',NOT GoKInstance/ShRegister(0).COMB,'1');
F1HzCnt_T(4) <= (F1HzEnable AND F1HzCnt(0) AND F1HzCnt(1) AND 
	F1HzCnt(2) AND F1HzCnt(3));

FTCPE_F1HzCnt5: FTCPE port map (F1HzCnt(5),F1HzCnt_T(5),NOT Clk,'0',NOT GoKInstance/ShRegister(0).COMB,'1');
F1HzCnt_T(5) <= (F1HzEnable AND F1HzCnt(0) AND F1HzCnt(1) AND 
	F1HzCnt(2) AND F1HzCnt(3) AND F1HzCnt(4));

FTCPE_F1HzCnt6: FTCPE port map (F1HzCnt(6),F1HzCnt_T(6),NOT Clk,'0',NOT GoKInstance/ShRegister(0).COMB,'1');
F1HzCnt_T(6) <= NOT (((NOT F1HzEnable)
	OR (NOT F1HzCnt(0))
	OR (NOT F1HzCnt(1))
	OR (NOT F1HzCnt(2))
	OR (NOT F1HzCnt(3))
	OR (NOT F1HzCnt(4))
	OR (NOT F1HzCnt(5))
	OR (F1HzCnt(19) AND NOT F1HzCnt(10) AND NOT F1HzCnt(6) AND 
	NOT F1HzCnt(11) AND NOT F1HzCnt(7) AND NOT F1HzCnt(8) AND F1HzCnt(9) AND 
	NOT F1HzCnt(12) AND NOT F1HzCnt(13) AND F1HzCnt(14) AND NOT F1HzCnt(15) AND 
	F1HzCnt(16) AND F1HzCnt(17) AND F1HzCnt(18))));

FTCPE_F1HzCnt7: FTCPE port map (F1HzCnt(7),F1HzCnt_T(7),NOT Clk,'0',NOT GoKInstance/ShRegister(0).COMB,'1');
F1HzCnt_T(7) <= (F1HzEnable AND F1HzCnt(0) AND F1HzCnt(1) AND 
	F1HzCnt(2) AND F1HzCnt(3) AND F1HzCnt(4) AND F1HzCnt(5) AND 
	F1HzCnt(6));

FTCPE_F1HzCnt8: FTCPE port map (F1HzCnt(8),F1HzCnt_T(8),NOT Clk,'0',NOT GoKInstance/ShRegister(0).COMB,'1');
F1HzCnt_T(8) <= (F1HzEnable AND F1HzCnt(0) AND F1HzCnt(1) AND 
	F1HzCnt(2) AND F1HzCnt(3) AND F1HzCnt(4) AND F1HzCnt(5) AND 
	F1HzCnt(6) AND F1HzCnt(7));

FTCPE_F1HzCnt9: FTCPE port map (F1HzCnt(9),F1HzCnt_T(9),NOT Clk,'0',NOT GoKInstance/ShRegister(0).COMB,'1');
F1HzCnt_T(9) <= ((F1HzEnable AND F1HzCnt(0) AND F1HzCnt(1) AND 
	F1HzCnt(2) AND F1HzCnt(3) AND F1HzCnt(4) AND F1HzCnt(5) AND 
	F1HzCnt(6) AND F1HzCnt(7) AND F1HzCnt(8))
	OR (F1HzEnable AND F1HzCnt(19) AND F1HzCnt(0) AND 
	NOT F1HzCnt(10) AND F1HzCnt(1) AND F1HzCnt(2) AND F1HzCnt(3) AND 
	F1HzCnt(4) AND F1HzCnt(5) AND NOT F1HzCnt(6) AND NOT F1HzCnt(11) AND 
	NOT F1HzCnt(7) AND NOT F1HzCnt(8) AND F1HzCnt(9) AND NOT F1HzCnt(12) AND 
	NOT F1HzCnt(13) AND F1HzCnt(14) AND NOT F1HzCnt(15) AND F1HzCnt(16) AND 
	F1HzCnt(17) AND F1HzCnt(18)));

FTCPE_F1HzCnt10: FTCPE port map (F1HzCnt(10),F1HzCnt_T(10),NOT Clk,'0',NOT GoKInstance/ShRegister(0).COMB,'1');
F1HzCnt_T(10) <= (F1HzEnable AND F1HzCnt(0) AND F1HzCnt(1) AND 
	F1HzCnt(2) AND F1HzCnt(3) AND F1HzCnt(4) AND F1HzCnt(5) AND 
	F1HzCnt(6) AND F1HzCnt(7) AND F1HzCnt(8) AND F1HzCnt(9));

FTCPE_F1HzCnt11: FTCPE port map (F1HzCnt(11),F1HzCnt_T(11),NOT Clk,'0',NOT GoKInstance/ShRegister(0).COMB,'1');
F1HzCnt_T(11) <= (F1HzEnable AND F1HzCnt(0) AND F1HzCnt(10) AND 
	F1HzCnt(1) AND F1HzCnt(2) AND F1HzCnt(3) AND F1HzCnt(4) AND 
	F1HzCnt(5) AND F1HzCnt(6) AND F1HzCnt(7) AND F1HzCnt(8) AND 
	F1HzCnt(9));

FTCPE_F1HzCnt12: FTCPE port map (F1HzCnt(12),F1HzCnt_T(12),NOT Clk,'0',NOT GoKInstance/ShRegister(0).COMB,'1');
F1HzCnt_T(12) <= (F1HzEnable AND F1HzCnt(0) AND F1HzCnt(10) AND 
	F1HzCnt(1) AND F1HzCnt(2) AND F1HzCnt(3) AND F1HzCnt(4) AND 
	F1HzCnt(5) AND F1HzCnt(6) AND F1HzCnt(11) AND F1HzCnt(7) AND 
	F1HzCnt(8) AND F1HzCnt(9));

FTCPE_F1HzCnt13: FTCPE port map (F1HzCnt(13),F1HzCnt_T(13),NOT Clk,'0',NOT GoKInstance/ShRegister(0).COMB,'1');
F1HzCnt_T(13) <= (F1HzEnable AND F1HzCnt(0) AND F1HzCnt(10) AND 
	F1HzCnt(1) AND F1HzCnt(2) AND F1HzCnt(3) AND F1HzCnt(4) AND 
	F1HzCnt(5) AND F1HzCnt(6) AND F1HzCnt(11) AND F1HzCnt(7) AND 
	F1HzCnt(8) AND F1HzCnt(9) AND F1HzCnt(12));

FTCPE_F1HzCnt14: FTCPE port map (F1HzCnt(14),F1HzCnt_T(14),NOT Clk,'0',NOT GoKInstance/ShRegister(0).COMB,'1');
F1HzCnt_T(14) <= ((F1HzEnable AND F1HzCnt(0) AND F1HzCnt(10) AND 
	F1HzCnt(1) AND F1HzCnt(2) AND F1HzCnt(3) AND F1HzCnt(4) AND 
	F1HzCnt(5) AND F1HzCnt(6) AND F1HzCnt(11) AND F1HzCnt(7) AND 
	F1HzCnt(8) AND F1HzCnt(9) AND F1HzCnt(12) AND F1HzCnt(13))
	OR (F1HzEnable AND F1HzCnt(19) AND F1HzCnt(0) AND 
	NOT F1HzCnt(10) AND F1HzCnt(1) AND F1HzCnt(2) AND F1HzCnt(3) AND 
	F1HzCnt(4) AND F1HzCnt(5) AND NOT F1HzCnt(6) AND NOT F1HzCnt(11) AND 
	NOT F1HzCnt(7) AND NOT F1HzCnt(8) AND F1HzCnt(9) AND NOT F1HzCnt(12) AND 
	NOT F1HzCnt(13) AND F1HzCnt(14) AND NOT F1HzCnt(15) AND F1HzCnt(16) AND 
	F1HzCnt(17) AND F1HzCnt(18)));

FTCPE_F1HzCnt15: FTCPE port map (F1HzCnt(15),F1HzCnt_T(15),NOT Clk,'0',NOT GoKInstance/ShRegister(0).COMB,'1');
F1HzCnt_T(15) <= (F1HzEnable AND F1HzCnt(0) AND F1HzCnt(10) AND 
	F1HzCnt(1) AND F1HzCnt(2) AND F1HzCnt(3) AND F1HzCnt(4) AND 
	F1HzCnt(5) AND F1HzCnt(6) AND F1HzCnt(11) AND F1HzCnt(7) AND 
	F1HzCnt(8) AND F1HzCnt(9) AND F1HzCnt(12) AND F1HzCnt(13) AND 
	F1HzCnt(14));

FTCPE_F1HzCnt16: FTCPE port map (F1HzCnt(16),F1HzCnt_T(16),NOT Clk,'0',NOT GoKInstance/ShRegister(0).COMB,'1');
F1HzCnt_T(16) <= ((F1HzEnable AND F1HzCnt(0) AND F1HzCnt(10) AND 
	F1HzCnt(1) AND F1HzCnt(2) AND F1HzCnt(3) AND F1HzCnt(4) AND 
	F1HzCnt(5) AND F1HzCnt(6) AND F1HzCnt(11) AND F1HzCnt(7) AND 
	F1HzCnt(8) AND F1HzCnt(9) AND F1HzCnt(12) AND F1HzCnt(13) AND 
	F1HzCnt(14) AND F1HzCnt(15))
	OR (F1HzEnable AND F1HzCnt(19) AND F1HzCnt(0) AND 
	NOT F1HzCnt(10) AND F1HzCnt(1) AND F1HzCnt(2) AND F1HzCnt(3) AND 
	F1HzCnt(4) AND F1HzCnt(5) AND NOT F1HzCnt(6) AND NOT F1HzCnt(11) AND 
	NOT F1HzCnt(7) AND NOT F1HzCnt(8) AND F1HzCnt(9) AND NOT F1HzCnt(12) AND 
	NOT F1HzCnt(13) AND F1HzCnt(14) AND NOT F1HzCnt(15) AND F1HzCnt(16) AND 
	F1HzCnt(17) AND F1HzCnt(18)));

FTCPE_F1HzCnt17: FTCPE port map (F1HzCnt(17),F1HzCnt_T(17),NOT Clk,'0',NOT GoKInstance/ShRegister(0).COMB,'1');
F1HzCnt_T(17) <= ((F1HzEnable AND F1HzCnt(0) AND F1HzCnt(10) AND 
	F1HzCnt(1) AND F1HzCnt(2) AND F1HzCnt(3) AND F1HzCnt(4) AND 
	F1HzCnt(5) AND F1HzCnt(6) AND F1HzCnt(11) AND F1HzCnt(7) AND 
	F1HzCnt(8) AND F1HzCnt(9) AND F1HzCnt(12) AND F1HzCnt(13) AND 
	F1HzCnt(14) AND F1HzCnt(15) AND F1HzCnt(16))
	OR (F1HzEnable AND F1HzCnt(19) AND F1HzCnt(0) AND 
	NOT F1HzCnt(10) AND F1HzCnt(1) AND F1HzCnt(2) AND F1HzCnt(3) AND 
	F1HzCnt(4) AND F1HzCnt(5) AND NOT F1HzCnt(6) AND NOT F1HzCnt(11) AND 
	NOT F1HzCnt(7) AND NOT F1HzCnt(8) AND F1HzCnt(9) AND NOT F1HzCnt(12) AND 
	NOT F1HzCnt(13) AND F1HzCnt(14) AND NOT F1HzCnt(15) AND F1HzCnt(16) AND 
	F1HzCnt(17) AND F1HzCnt(18)));

FTCPE_F1HzCnt18: FTCPE port map (F1HzCnt(18),F1HzCnt_T(18),NOT Clk,'0',NOT GoKInstance/ShRegister(0).COMB,'1');
F1HzCnt_T(18) <= ((F1HzEnable AND F1HzCnt(0) AND F1HzCnt(10) AND 
	F1HzCnt(1) AND F1HzCnt(2) AND F1HzCnt(3) AND F1HzCnt(4) AND 
	F1HzCnt(5) AND F1HzCnt(6) AND F1HzCnt(11) AND F1HzCnt(7) AND 
	F1HzCnt(8) AND F1HzCnt(9) AND F1HzCnt(12) AND F1HzCnt(13) AND 
	F1HzCnt(14) AND F1HzCnt(15) AND F1HzCnt(16) AND F1HzCnt(17))
	OR (F1HzEnable AND F1HzCnt(19) AND F1HzCnt(0) AND 
	NOT F1HzCnt(10) AND F1HzCnt(1) AND F1HzCnt(2) AND F1HzCnt(3) AND 
	F1HzCnt(4) AND F1HzCnt(5) AND NOT F1HzCnt(6) AND NOT F1HzCnt(11) AND 
	NOT F1HzCnt(7) AND NOT F1HzCnt(8) AND F1HzCnt(9) AND NOT F1HzCnt(12) AND 
	NOT F1HzCnt(13) AND F1HzCnt(14) AND NOT F1HzCnt(15) AND F1HzCnt(16) AND 
	F1HzCnt(17) AND F1HzCnt(18)));

FTCPE_F1HzCnt19: FTCPE port map (F1HzCnt(19),F1HzCnt_T(19),NOT Clk,'0',NOT GoKInstance/ShRegister(0).COMB,'1');
F1HzCnt_T(19) <= ((F1HzEnable AND F1HzCnt(0) AND F1HzCnt(10) AND 
	F1HzCnt(1) AND F1HzCnt(2) AND F1HzCnt(3) AND F1HzCnt(4) AND 
	F1HzCnt(5) AND F1HzCnt(6) AND F1HzCnt(11) AND F1HzCnt(7) AND 
	F1HzCnt(8) AND F1HzCnt(9) AND F1HzCnt(12) AND F1HzCnt(13) AND 
	F1HzCnt(14) AND F1HzCnt(15) AND F1HzCnt(16) AND F1HzCnt(17) AND 
	F1HzCnt(18))
	OR (F1HzEnable AND F1HzCnt(19) AND F1HzCnt(0) AND 
	NOT F1HzCnt(10) AND F1HzCnt(1) AND F1HzCnt(2) AND F1HzCnt(3) AND 
	F1HzCnt(4) AND F1HzCnt(5) AND NOT F1HzCnt(6) AND NOT F1HzCnt(11) AND 
	NOT F1HzCnt(7) AND NOT F1HzCnt(8) AND F1HzCnt(9) AND NOT F1HzCnt(12) AND 
	NOT F1HzCnt(13) AND F1HzCnt(14) AND NOT F1HzCnt(15) AND F1HzCnt(16) AND 
	F1HzCnt(17) AND F1HzCnt(18)));

FDCPE_F1HzEnable: FDCPE port map (F1HzEnable,F1HzEnable_D,NOT Clk,'0','0','1');
F1HzEnable_D <= ((NOT Reset AND F1HzEnable)
	OR (Reset AND MachineState_FFd1 AND MachineState_FFd3)
	OR (Reset AND MachineState_FFd1 AND NOT MachineState_FFd2)
	OR (Reset AND MachineState_FFd3 AND NOT MachineState_FFd2));

FTCPE_FClk: FTCPE port map (FClk,FClk_T,NOT Clk,NOT Reset,'0','1');
FClk_T <= (FDivInstance/FDivCnt(0) AND FDivInstance/FDivCnt(1) AND 
	FDivInstance/FDivCnt(2) AND FDivInstance/FDivCnt(3) AND FDivInstance/FDivCnt(4) AND 
	FDivInstance/FDivCnt(5) AND FDivInstance/FDivCnt(6));

FTCPE_FDiv0: FTCPE port map (FDiv(0),'0',FClk,NOT Reset,'0','1');

FTCPE_FDiv1: FTCPE port map (FDiv(1),FDiv(0),FClk,NOT Reset,'0','1');

FTCPE_FDiv2: FTCPE port map (FDiv(2),FDiv_T(2),FClk,NOT Reset,'0','1');
FDiv_T(2) <= (FDiv(0) AND FDiv(1));

FTCPE_FDiv3: FTCPE port map (FDiv(3),FDiv_T(3),FClk,NOT Reset,'0','1');
FDiv_T(3) <= (FDiv(0) AND FDiv(2) AND FDiv(1));

FTCPE_FDivInstance/FDivCnt0: FTCPE port map (FDivInstance/FDivCnt(0),'0',NOT Clk,NOT Reset,'0','1');

FTCPE_FDivInstance/FDivCnt1: FTCPE port map (FDivInstance/FDivCnt(1),FDivInstance/FDivCnt(0),NOT Clk,NOT Reset,'0','1');

FTCPE_FDivInstance/FDivCnt2: FTCPE port map (FDivInstance/FDivCnt(2),FDivInstance/FDivCnt_T(2),NOT Clk,NOT Reset,'0','1');
FDivInstance/FDivCnt_T(2) <= (FDivInstance/FDivCnt(0) AND FDivInstance/FDivCnt(1));

FTCPE_FDivInstance/FDivCnt3: FTCPE port map (FDivInstance/FDivCnt(3),FDivInstance/FDivCnt_T(3),NOT Clk,NOT Reset,'0','1');
FDivInstance/FDivCnt_T(3) <= (FDivInstance/FDivCnt(0) AND FDivInstance/FDivCnt(1) AND 
	FDivInstance/FDivCnt(2));

FTCPE_FDivInstance/FDivCnt4: FTCPE port map (FDivInstance/FDivCnt(4),FDivInstance/FDivCnt_T(4),NOT Clk,NOT Reset,'0','1');
FDivInstance/FDivCnt_T(4) <= (FDivInstance/FDivCnt(0) AND FDivInstance/FDivCnt(1) AND 
	FDivInstance/FDivCnt(2) AND FDivInstance/FDivCnt(3));

FTCPE_FDivInstance/FDivCnt5: FTCPE port map (FDivInstance/FDivCnt(5),FDivInstance/FDivCnt_T(5),NOT Clk,NOT Reset,'0','1');
FDivInstance/FDivCnt_T(5) <= (FDivInstance/FDivCnt(0) AND FDivInstance/FDivCnt(1) AND 
	FDivInstance/FDivCnt(2) AND FDivInstance/FDivCnt(3) AND FDivInstance/FDivCnt(4));

FTCPE_FDivInstance/FDivCnt6: FTCPE port map (FDivInstance/FDivCnt(6),FDivInstance/FDivCnt_T(6),NOT Clk,NOT Reset,'0','1');
FDivInstance/FDivCnt_T(6) <= (FDivInstance/FDivCnt(0) AND FDivInstance/FDivCnt(1) AND 
	FDivInstance/FDivCnt(2) AND FDivInstance/FDivCnt(3) AND FDivInstance/FDivCnt(4) AND 
	FDivInstance/FDivCnt(5));


GoKInstance/ShRegister(0).COMB <= (Reset AND Clr);FDCPE_GoKInstance/ShRegister0: FDCPE port map (GoKInstance/ShRegister(0),GoKey,FDiv(2),'0',NOT Reset,'1');

FDCPE_GoKInstance/ShRegister1: FDCPE port map (GoKInstance/ShRegister(1),GoKInstance/ShRegister(0),FDiv(2),'0',NOT Reset,'1');

FDCPE_GoKInstance/ShRegister2: FDCPE port map (GoKInstance/ShRegister(2),GoKInstance/ShRegister(1),FDiv(2),'0',NOT Reset,'1');

FDCPE_GoKInstance/ShRegister3: FDCPE port map (GoKInstance/ShRegister(3),GoKInstance/ShRegister(2),FDiv(2),'0',NOT Reset,'1');

LDCP_GoKeyStatus: LDCP port map (GoKeyStatus,NOT '0',,GoKeyStatus_CLR,'0');
GoKeyStatus_G <= (NOT GoKInstance/ShRegister(0) AND 
	NOT GoKInstance/ShRegister(1) AND NOT GoKInstance/ShRegister(2) AND 
	NOT GoKInstance/ShRegister(3));
GoKeyStatus_CLR <= (GoKInstance/ShRegister(0) AND 
	GoKInstance/ShRegister(1) AND GoKInstance/ShRegister(2) AND 
	GoKInstance/ShRegister(3));

FTCPE_HzRange: FTCPE port map (HzRange,HzRange_T,NOT Clk,'0',NOT Reset,'1');
HzRange_T <= (NOT MachineState_FFd1 AND NOT MachineState_FFd3 AND 
	MachineState_FFd2);

FTCPE_MachineState_FFd1: FTCPE port map (MachineState_FFd1,MachineState_FFd1_T,NOT Clk,NOT Reset,'0','1');
MachineState_FFd1_T <= ((MachineState_FFd1 AND NOT MachineState_FFd3 AND 
	MachineState_FFd2)
	OR (NOT MachineState_FFd1 AND MachineState_FFd3 AND 
	NOT MachineState_FFd2));

FTCPE_MachineState_FFd2: FTCPE port map (MachineState_FFd2,MachineState_FFd2_T,NOT Clk,NOT Reset,'0','1');
MachineState_FFd2_T <= ((MachineState_FFd1 AND MachineState_FFd3 AND RunLed AND 
	NOT MachineState_FFd2)
	OR (NOT MachineState_FFd1 AND MachineState_FFd3 AND 
	MachineState_FFd2 AND NOT GoKeyStatus AND NOT RangeKeyStatus)
	OR (NOT MachineState_FFd1 AND NOT MachineState_FFd3 AND 
	NOT MachineState_FFd2 AND NOT GoKeyStatus AND RangeKeyStatus));

FDCPE_MachineState_FFd3: FDCPE port map (MachineState_FFd3,MachineState_FFd3_D,NOT Clk,NOT Reset,'0','1');
MachineState_FFd3_D <= NOT (((MachineState_FFd1 AND RunLed AND NOT MachineState_FFd2)
	OR (NOT MachineState_FFd1 AND MachineState_FFd3 AND 
	NOT MachineState_FFd2)
	OR (NOT MachineState_FFd1 AND NOT MachineState_FFd2 AND 
	NOT GoKeyStatus)
	OR (NOT MachineState_FFd1 AND MachineState_FFd3 AND 
	NOT GoKeyStatus AND NOT RangeKeyStatus)));


MuxDisplInstance/Blank <= ((MuxDisplInstance/SelCnt(0) AND 
	MuxDisplInstance/SelCnt(1) AND HzRange AND NOT R1000(3) AND NOT R1000(2) AND NOT R1000(1) AND 
	NOT R1000(0))
	OR (MuxDisplInstance/SelCnt(0) AND 
	MuxDisplInstance/SelCnt(1) AND NOT HzRange AND NOT R100000(3) AND NOT R100000(2) AND NOT R100000(1) AND 
	NOT R100000(0))
	OR (MuxDisplInstance/SelCnt(1) AND HzRange AND NOT R1000(3) AND 
	NOT R100(3) AND NOT R1000(2) AND NOT R100(2) AND NOT R1000(1) AND NOT R100(1) AND 
	NOT R1000(0) AND NOT R100(0))
	OR (MuxDisplInstance/SelCnt(1) AND NOT HzRange AND 
	NOT R100000(3) AND NOT R10000(3) AND NOT R100000(2) AND NOT R10000(2) AND NOT R100000(1) AND 
	NOT R10000(1) AND NOT R100000(0) AND NOT R10000(0))
	OR (MuxDisplInstance/SelCnt(0) AND HzRange AND NOT R1000(3) AND 
	NOT R100(3) AND NOT R10(3) AND NOT R1000(2) AND NOT R100(2) AND NOT R10(2) AND 
	NOT R1000(1) AND NOT R100(1) AND NOT R10(1) AND NOT R1000(0) AND NOT R100(0) AND NOT R10(0)));

FTCPE_MuxDisplInstance/SelCnt0: FTCPE port map (MuxDisplInstance/SelCnt(0),'0',FDiv(3),NOT Reset,'0','1');

FTCPE_MuxDisplInstance/SelCnt1: FTCPE port map (MuxDisplInstance/SelCnt(1),MuxDisplInstance/SelCnt(0),FDiv(3),NOT Reset,'0','1');


MuxDisplInstance/Tetr(0) <= ((MuxDisplInstance/SelCnt(0) AND 
	MuxDisplInstance/SelCnt(1) AND HzRange AND NOT R1000(0))
	OR (MuxDisplInstance/SelCnt(0) AND 
	MuxDisplInstance/SelCnt(1) AND NOT HzRange AND NOT R100000(0))
	OR (MuxDisplInstance/SelCnt(0) AND 
	NOT MuxDisplInstance/SelCnt(1) AND HzRange AND NOT R10(0))
	OR (MuxDisplInstance/SelCnt(0) AND 
	NOT MuxDisplInstance/SelCnt(1) AND NOT HzRange AND NOT R1000(0))
	OR (NOT MuxDisplInstance/SelCnt(0) AND 
	MuxDisplInstance/SelCnt(1) AND HzRange AND NOT R100(0))
	OR (NOT MuxDisplInstance/SelCnt(0) AND 
	MuxDisplInstance/SelCnt(1) AND NOT HzRange AND NOT R10000(0))
	OR (NOT MuxDisplInstance/SelCnt(0) AND 
	NOT MuxDisplInstance/SelCnt(1) AND HzRange AND NOT R1(0))
	OR (NOT MuxDisplInstance/SelCnt(0) AND 
	NOT MuxDisplInstance/SelCnt(1) AND NOT HzRange AND NOT R100(0)));


MuxDisplInstance/Tetr(1) <= ((MuxDisplInstance/SelCnt(0) AND 
	MuxDisplInstance/SelCnt(1) AND HzRange AND NOT R1000(1))
	OR (MuxDisplInstance/SelCnt(0) AND 
	MuxDisplInstance/SelCnt(1) AND NOT HzRange AND NOT R100000(1))
	OR (MuxDisplInstance/SelCnt(0) AND 
	NOT MuxDisplInstance/SelCnt(1) AND HzRange AND NOT R10(1))
	OR (MuxDisplInstance/SelCnt(0) AND 
	NOT MuxDisplInstance/SelCnt(1) AND NOT HzRange AND NOT R1000(1))
	OR (NOT MuxDisplInstance/SelCnt(0) AND 
	MuxDisplInstance/SelCnt(1) AND HzRange AND NOT R100(1))
	OR (NOT MuxDisplInstance/SelCnt(0) AND 
	MuxDisplInstance/SelCnt(1) AND NOT HzRange AND NOT R10000(1))
	OR (NOT MuxDisplInstance/SelCnt(0) AND 
	NOT MuxDisplInstance/SelCnt(1) AND HzRange AND NOT R1(1))
	OR (NOT MuxDisplInstance/SelCnt(0) AND 
	NOT MuxDisplInstance/SelCnt(1) AND NOT HzRange AND NOT R100(1)));


MuxDisplInstance/Tetr(2) <= ((MuxDisplInstance/SelCnt(0) AND 
	MuxDisplInstance/SelCnt(1) AND HzRange AND NOT R1000(2))
	OR (MuxDisplInstance/SelCnt(0) AND 
	MuxDisplInstance/SelCnt(1) AND NOT HzRange AND NOT R100000(2))
	OR (MuxDisplInstance/SelCnt(0) AND 
	NOT MuxDisplInstance/SelCnt(1) AND HzRange AND NOT R10(2))
	OR (MuxDisplInstance/SelCnt(0) AND 
	NOT MuxDisplInstance/SelCnt(1) AND NOT HzRange AND NOT R1000(2))
	OR (NOT MuxDisplInstance/SelCnt(0) AND 
	MuxDisplInstance/SelCnt(1) AND HzRange AND NOT R100(2))
	OR (NOT MuxDisplInstance/SelCnt(0) AND 
	MuxDisplInstance/SelCnt(1) AND NOT HzRange AND NOT R10000(2))
	OR (NOT MuxDisplInstance/SelCnt(0) AND 
	NOT MuxDisplInstance/SelCnt(1) AND HzRange AND NOT R1(2))
	OR (NOT MuxDisplInstance/SelCnt(0) AND 
	NOT MuxDisplInstance/SelCnt(1) AND NOT HzRange AND NOT R100(2)));


MuxDisplInstance/Tetr(3) <= ((MuxDisplInstance/SelCnt(0) AND 
	MuxDisplInstance/SelCnt(1) AND HzRange AND NOT R1000(3))
	OR (MuxDisplInstance/SelCnt(0) AND 
	MuxDisplInstance/SelCnt(1) AND NOT HzRange AND NOT R100000(3))
	OR (MuxDisplInstance/SelCnt(0) AND 
	NOT MuxDisplInstance/SelCnt(1) AND HzRange AND NOT R10(3))
	OR (MuxDisplInstance/SelCnt(0) AND 
	NOT MuxDisplInstance/SelCnt(1) AND NOT HzRange AND NOT R1000(3))
	OR (NOT MuxDisplInstance/SelCnt(0) AND 
	MuxDisplInstance/SelCnt(1) AND HzRange AND NOT R100(3))
	OR (NOT MuxDisplInstance/SelCnt(0) AND 
	MuxDisplInstance/SelCnt(1) AND NOT HzRange AND NOT R10000(3))
	OR (NOT MuxDisplInstance/SelCnt(0) AND 
	NOT MuxDisplInstance/SelCnt(1) AND HzRange AND NOT R1(3))
	OR (NOT MuxDisplInstance/SelCnt(0) AND 
	NOT MuxDisplInstance/SelCnt(1) AND NOT HzRange AND NOT R100(3)));

FDCPE_R1000000: FDCPE port map (R100000(0),Cnt100000(0),NOT Clk,NOT Reset,'0',R100000_CE(0));
R100000_CE(0) <= (MachineState_FFd1 AND MachineState_FFd2);

FDCPE_R1000001: FDCPE port map (R100000(1),Cnt100000(1),NOT Clk,NOT Reset,'0',R100000_CE(1));
R100000_CE(1) <= (MachineState_FFd1 AND MachineState_FFd2);

FDCPE_R1000002: FDCPE port map (R100000(2),Cnt100000(2),NOT Clk,NOT Reset,'0',R100000_CE(2));
R100000_CE(2) <= (MachineState_FFd1 AND MachineState_FFd2);

FDCPE_R1000003: FDCPE port map (R100000(3),Cnt100000(3),NOT Clk,NOT Reset,'0',R100000_CE(3));
R100000_CE(3) <= (MachineState_FFd1 AND MachineState_FFd2);

FDCPE_R100000: FDCPE port map (R10000(0),Cnt10000(0),NOT Clk,NOT Reset,'0',R10000_CE(0));
R10000_CE(0) <= (MachineState_FFd1 AND MachineState_FFd2);

FDCPE_R100001: FDCPE port map (R10000(1),Cnt10000(1),NOT Clk,NOT Reset,'0',R10000_CE(1));
R10000_CE(1) <= (MachineState_FFd1 AND MachineState_FFd2);

FDCPE_R100002: FDCPE port map (R10000(2),Cnt10000(2),NOT Clk,NOT Reset,'0',R10000_CE(2));
R10000_CE(2) <= (MachineState_FFd1 AND MachineState_FFd2);

FDCPE_R100003: FDCPE port map (R10000(3),Cnt10000(3),NOT Clk,NOT Reset,'0',R10000_CE(3));
R10000_CE(3) <= (MachineState_FFd1 AND MachineState_FFd2);

FDCPE_R10000: FDCPE port map (R1000(0),Cnt1000(0),NOT Clk,NOT Reset,'0',R1000_CE(0));
R1000_CE(0) <= (MachineState_FFd1 AND MachineState_FFd2);

FDCPE_R10001: FDCPE port map (R1000(1),Cnt1000(1),NOT Clk,NOT Reset,'0',R1000_CE(1));
R1000_CE(1) <= (MachineState_FFd1 AND MachineState_FFd2);

FDCPE_R10002: FDCPE port map (R1000(2),Cnt1000(2),NOT Clk,NOT Reset,'0',R1000_CE(2));
R1000_CE(2) <= (MachineState_FFd1 AND MachineState_FFd2);

FDCPE_R10003: FDCPE port map (R1000(3),Cnt1000(3),NOT Clk,NOT Reset,'0',R1000_CE(3));
R1000_CE(3) <= (MachineState_FFd1 AND MachineState_FFd2);

FDCPE_R1000: FDCPE port map (R100(0),Cnt100(0),NOT Clk,NOT Reset,'0',R100_CE(0));
R100_CE(0) <= (MachineState_FFd1 AND MachineState_FFd2);

FDCPE_R1001: FDCPE port map (R100(1),Cnt100(1),NOT Clk,NOT Reset,'0',R100_CE(1));
R100_CE(1) <= (MachineState_FFd1 AND MachineState_FFd2);

FDCPE_R1002: FDCPE port map (R100(2),Cnt100(2),NOT Clk,NOT Reset,'0',R100_CE(2));
R100_CE(2) <= (MachineState_FFd1 AND MachineState_FFd2);

FDCPE_R1003: FDCPE port map (R100(3),Cnt100(3),NOT Clk,NOT Reset,'0',R100_CE(3));
R100_CE(3) <= (MachineState_FFd1 AND MachineState_FFd2);

FDCPE_R100: FDCPE port map (R10(0),Cnt10(0),NOT Clk,NOT Reset,'0',R10_CE(0));
R10_CE(0) <= (MachineState_FFd1 AND MachineState_FFd2);

FDCPE_R101: FDCPE port map (R10(1),Cnt10(1),NOT Clk,NOT Reset,'0',R10_CE(1));
R10_CE(1) <= (MachineState_FFd1 AND MachineState_FFd2);

FDCPE_R102: FDCPE port map (R10(2),Cnt10(2),NOT Clk,NOT Reset,'0',R10_CE(2));
R10_CE(2) <= (MachineState_FFd1 AND MachineState_FFd2);

FDCPE_R103: FDCPE port map (R10(3),Cnt10(3),NOT Clk,NOT Reset,'0',R10_CE(3));
R10_CE(3) <= (MachineState_FFd1 AND MachineState_FFd2);

FDCPE_R10: FDCPE port map (R1(0),Cnt1(0),NOT Clk,NOT Reset,'0',R1_CE(0));
R1_CE(0) <= (MachineState_FFd1 AND MachineState_FFd2);

FDCPE_R11: FDCPE port map (R1(1),Cnt1(1),NOT Clk,NOT Reset,'0',R1_CE(1));
R1_CE(1) <= (MachineState_FFd1 AND MachineState_FFd2);

FDCPE_R12: FDCPE port map (R1(2),Cnt1(2),NOT Clk,NOT Reset,'0',R1_CE(2));
R1_CE(2) <= (MachineState_FFd1 AND MachineState_FFd2);

FDCPE_R13: FDCPE port map (R1(3),Cnt1(3),NOT Clk,NOT Reset,'0',R1_CE(3));
R1_CE(3) <= (MachineState_FFd1 AND MachineState_FFd2);

FDCPE_RangeKInstance/ShRegister0: FDCPE port map (RangeKInstance/ShRegister(0),RangeKey,FDiv(2),'0',NOT Reset,'1');

FDCPE_RangeKInstance/ShRegister1: FDCPE port map (RangeKInstance/ShRegister(1),RangeKInstance/ShRegister(0),FDiv(2),'0',NOT Reset,'1');

FDCPE_RangeKInstance/ShRegister2: FDCPE port map (RangeKInstance/ShRegister(2),RangeKInstance/ShRegister(1),FDiv(2),'0',NOT Reset,'1');

FDCPE_RangeKInstance/ShRegister3: FDCPE port map (RangeKInstance/ShRegister(3),RangeKInstance/ShRegister(2),FDiv(2),'0',NOT Reset,'1');

LDCP_RangeKeyStatus: LDCP port map (RangeKeyStatus,NOT '0',,RangeKeyStatus_CLR,'0');
RangeKeyStatus_G <= (NOT RangeKInstance/ShRegister(0) AND 
	NOT RangeKInstance/ShRegister(1) AND NOT RangeKInstance/ShRegister(2) AND 
	NOT RangeKInstance/ShRegister(3));
RangeKeyStatus_CLR <= (RangeKInstance/ShRegister(0) AND 
	RangeKInstance/ShRegister(1) AND RangeKInstance/ShRegister(2) AND 
	RangeKInstance/ShRegister(3));

FTCPE_RunLed: FTCPE port map (RunLed,F1HzEnable,F1HzCnt(19),'0',NOT GoKInstance/ShRegister(0).COMB,'1');


Seg_A <= ((MuxDisplInstance/Blank)
	OR (MuxDisplInstance/Tetr(3) AND 
	MuxDisplInstance/Tetr(2) AND MuxDisplInstance/Tetr(1) AND 
	NOT MuxDisplInstance/Tetr(0))
	OR (MuxDisplInstance/Tetr(3) AND 
	NOT MuxDisplInstance/Tetr(2) AND MuxDisplInstance/Tetr(1) AND 
	MuxDisplInstance/Tetr(0))
	OR (NOT MuxDisplInstance/Tetr(3) AND 
	MuxDisplInstance/Tetr(2) AND NOT MuxDisplInstance/Tetr(1) AND 
	NOT MuxDisplInstance/Tetr(0))
	OR (NOT MuxDisplInstance/Tetr(3) AND 
	NOT MuxDisplInstance/Tetr(2) AND MuxDisplInstance/Tetr(1) AND 
	NOT MuxDisplInstance/Tetr(0)));


Seg_B <= NOT ((NOT MuxDisplInstance/Tetr(0) AND NOT MuxDisplInstance/Blank)
	XOR ((MuxDisplInstance/Tetr(2) AND 
	MuxDisplInstance/Tetr(0) AND NOT MuxDisplInstance/Blank)
	OR (MuxDisplInstance/Tetr(3) AND 
	NOT MuxDisplInstance/Tetr(2) AND MuxDisplInstance/Tetr(1) AND NOT MuxDisplInstance/Blank)
	OR (NOT MuxDisplInstance/Tetr(3) AND 
	NOT MuxDisplInstance/Tetr(1) AND NOT MuxDisplInstance/Tetr(0) AND NOT MuxDisplInstance/Blank)));


Seg_C <= ((MuxDisplInstance/Blank)
	OR (NOT MuxDisplInstance/Tetr(3) AND 
	NOT MuxDisplInstance/Tetr(2) AND NOT MuxDisplInstance/Tetr(1))
	OR (NOT MuxDisplInstance/Tetr(3) AND 
	NOT MuxDisplInstance/Tetr(2) AND MuxDisplInstance/Tetr(0))
	OR (MuxDisplInstance/Tetr(3) AND 
	MuxDisplInstance/Tetr(2) AND NOT MuxDisplInstance/Tetr(1) AND 
	MuxDisplInstance/Tetr(0)));


Seg_D <= ((MuxDisplInstance/Blank)
	OR (NOT MuxDisplInstance/Tetr(2) AND 
	NOT MuxDisplInstance/Tetr(1) AND NOT MuxDisplInstance/Tetr(0))
	OR (MuxDisplInstance/Tetr(3) AND 
	MuxDisplInstance/Tetr(2) AND MuxDisplInstance/Tetr(1) AND 
	NOT MuxDisplInstance/Tetr(0))
	OR (MuxDisplInstance/Tetr(3) AND 
	NOT MuxDisplInstance/Tetr(2) AND MuxDisplInstance/Tetr(1) AND 
	MuxDisplInstance/Tetr(0))
	OR (NOT MuxDisplInstance/Tetr(3) AND 
	MuxDisplInstance/Tetr(2) AND NOT MuxDisplInstance/Tetr(1) AND 
	MuxDisplInstance/Tetr(0)));


Seg_E <= NOT (((NOT MuxDisplInstance/Tetr(3) AND 
	NOT MuxDisplInstance/Tetr(2) AND NOT MuxDisplInstance/Blank)
	OR (NOT MuxDisplInstance/Tetr(3) AND 
	NOT MuxDisplInstance/Tetr(1) AND NOT MuxDisplInstance/Blank)
	OR (MuxDisplInstance/Tetr(2) AND 
	MuxDisplInstance/Tetr(0) AND NOT MuxDisplInstance/Blank)
	OR (NOT MuxDisplInstance/Tetr(1) AND 
	MuxDisplInstance/Tetr(0) AND NOT MuxDisplInstance/Blank)));


Seg_F <= NOT ((NOT MuxDisplInstance/Tetr(3) AND NOT MuxDisplInstance/Blank)
	XOR ((MuxDisplInstance/Tetr(3) AND 
	NOT MuxDisplInstance/Tetr(2) AND MuxDisplInstance/Tetr(0) AND NOT MuxDisplInstance/Blank)
	OR (MuxDisplInstance/Tetr(3) AND 
	MuxDisplInstance/Tetr(1) AND MuxDisplInstance/Tetr(0) AND NOT MuxDisplInstance/Blank)
	OR (NOT MuxDisplInstance/Tetr(2) AND 
	MuxDisplInstance/Tetr(1) AND NOT MuxDisplInstance/Tetr(0) AND NOT MuxDisplInstance/Blank)));


Seg_G <= ((MuxDisplInstance/Blank)
	OR (MuxDisplInstance/Tetr(3) AND 
	MuxDisplInstance/Tetr(2) AND MuxDisplInstance/Tetr(1))
	OR (MuxDisplInstance/Tetr(3) AND 
	NOT MuxDisplInstance/Tetr(2) AND NOT MuxDisplInstance/Tetr(1) AND 
	NOT MuxDisplInstance/Tetr(0))
	OR (NOT MuxDisplInstance/Tetr(3) AND 
	NOT MuxDisplInstance/Tetr(2) AND MuxDisplInstance/Tetr(1) AND 
	MuxDisplInstance/Tetr(0)));


Seg_K <= NOT (((MuxDisplInstance/SelCnt(0) AND 
	NOT MuxDisplInstance/SelCnt(1) AND NOT HzRange)
	OR (NOT MuxDisplInstance/SelCnt(0) AND 
	NOT MuxDisplInstance/SelCnt(1) AND HzRange)));


Register Legend:
 FDCPE (Q,D,C,CLR,PRE,CE); 
 FDDCPE (Q,D,C,CLR,PRE,CE); 
 FTCPE (Q,D,C,CLR,PRE,CE); 
 FTDCPE (Q,D,C,CLR,PRE,CE); 
 LDCP  (Q,D,G,CLR,PRE); 

******************************  Device Pin Out *****************************

Device : XC2C256-6-TQ144


Pin Signal                         Pin Signal                        
No. Name                           No. Name                          
  1 VCC                              73 VCCIO-1.8                     
  2 WPU                              74 WPU                           
  3 WPU                              75 WPU                           
  4 WPU                              76 WPU                           
  5 WPU                              77 WPU                           
  6 WPU                              78 WPU                           
  7 WPU                              79 WPU                           
  8 VCCAUX                           80 WPU                           
  9 WPU                              81 WPU                           
 10 FInp                             82 WPU                           
 11 WPU                              83 WPU                           
 12 WPU                              84 VCC                           
 13 WPU                              85 WPU                           
 14 WPU                              86 WPU                           
 15 WPU                              87 WPU                           
 16 WPU                              88 WPU                           
 17 WPU                              89 GND                           
 18 WPU                              90 GND                           
 19 WPU                              91 WPU                           
 20 WPU                              92 WPU                           
 21 WPU                              93 VCCIO-1.8                     
 22 WPU                              94 RangeKey                      
 23 WPU                              95 WPU                           
 24 WPU                              96 WPU                           
 25 WPU                              97 WPU                           
 26 WPU                              98 WPU                           
 27 VCCIO-1.8                        99 GND                           
 28 WPU                             100 WPU                           
 29 GND                             101 WPU                           
 30 WPU                             102 WPU                           
 31 WPU                             103 WPU                           
 32 WPU                             104 WPU                           
 33 WPU                             105 WPU                           
 34 WPU                             106 WPU                           
 35 WPU                             107 WPU                           
 36 GND                             108 GND                           
 37 VCC                             109 VCCIO-1.8                     
 38 Clk                             110 WPU                           
 39 Reset                           111 WPU                           
 40 WPU                             112 WPU                           
 41 WPU                             113 WPU                           
 42 WPU                             114 WPU                           
 43 WPU                             115 WPU                           
 44 WPU                             116 WPU                           
 45 WPU                             117 WPU                           
 46 WPU                             118 WPU                           
 47 GND                             119 WPU                           
 48 WPU                             120 WPU                           
 49 WPU                             121 WPU                           
 50 WPU                             122 TDO                           
 51 WPU                             123 GND                           
 52 WPU                             124 WPU                           
 53 Seg_B                           125 WPU                           
 54 Seg_F                           126 DSel0                         
 55 VCCIO-1.8                       127 VCCIO-1.8                     
 56 Seg_A                           128 DSel1                         
 57 Seg_E                           129 DSel2                         
 58 Seg_D                           130 DSel3                         
 59 Seg_K                           131 WPU                           
 60 Seg_C                           132 WPU                           
 61 Seg_G                           133 WPU                           
 62 GND                             134 WPU                           
 63 TDI                             135 WPU                           
 64 WPU                             136 WPU                           
 65 TMS                             137 WPU                           
 66 WPU                             138 WPU                           
 67 TCK                             139 WPU                           
 68 WPU                             140 WPU                           
 69 RunLed                          141 VCCIO-1.8                     
 70 WPU                             142 WPU                           
 71 WPU                             143 GoKey                         
 72 GND                             144 GND                           


Legend :  NC  = Not Connected, unbonded pin
        PGND  = Unused I/O configured as additional Ground pin
         KPR  = Unused I/O with weak keeper (leave unconnected)
         WPU  = Unused I/O with weak pull up (leave unconnected)
         TIE  = Unused I/O floating -- must tie to VCC, GND or other signal
         VCC  = Dedicated Power Pin
      VCCAUX  = Power supply for JTAG pins
   VCCIO-3.3  = I/O supply voltage for LVTTL, LVCMOS33, SSTL3_I
   VCCIO-2.5  = I/O supply voltage for LVCMOS25, SSTL2_I
   VCCIO-1.8  = I/O supply voltage for LVCMOS18
   VCCIO-1.5  = I/O supply voltage for LVCMOS15, HSTL_I
        VREF  = Reference voltage for indicated input standard
       *VREF  = Reference voltage pin selected by software
         GND  = Dedicated Ground Pin
         TDI  = Test Data In, JTAG pin
         TDO  = Test Data Out, JTAG pin
         TCK  = Test Clock, JTAG pin
         TMS  = Test Mode Select, JTAG pin
  PROHIBITED  = User reserved pin
****************************  Compiler Options  ****************************

Following is a list of all global compiler options used by the fitter run.

Device(s) Specified                         : xc2c256-6-TQ144
Optimization Method                         : DENSITY
Multi-Level Logic Optimization              : ON
Ignore Timing Specifications                : OFF
Default Register Power Up Value             : LOW
Keep User Location Constraints              : ON
What-You-See-Is-What-You-Get                : OFF
Exhaustive Fitting                          : OFF
Keep Unused Inputs                          : OFF
Slew Rate                                   : FAST
Set Unused I/O Pin Termination              : PULLUP
Global Clock Optimization                   : ON
Global Set/Reset Optimization               : ON
Global Ouput Enable Optimization            : ON
Enable Input Registers                      : ON
Function Block Fan-in Limit                 : 38
Use DATA_GATE Attribute                     : ON
Set Tristate Outputs to Termination Mode    : PULLUP
Default Voltage Standard for All Outputs    : LVCMOS18
Input Limit                                 : 32
Pterm Limit                                 : 28