Signal Name | Total Pterms | Total Inputs | Function Block | Macrocell | Slew Rate | Bank | Pin Number | Pin Type | Pin Use | Reg Use | I/O Std | I/O Style | Reg Init State |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|
F1HzCnt<17> | 3 | 22 | FB2 | MC1 | 2 | 2 | I/O/GTS2 | (b) | TFF | RESET | |||
F1HzCnt<16> | 3 | 22 | FB2 | MC3 | 2 | 3 | I/O/GTS3 | (b) | TFF | RESET | |||
F1HzCnt<14> | 3 | 22 | FB2 | MC4 | 2 | 4 | I/O | (b) | TFF | RESET | |||
F1HzCnt<15> | 2 | 17 | FB2 | MC5 | 2 | 5 | I/O/GTS0 | (b) | TFF | RESET | |||
F1HzCnt<13> | 2 | 15 | FB2 | MC12 | 2 | 6 | I/O/GTS1 | (b) | TFF | RESET | |||
F1HzCnt<12> | 2 | 14 | FB2 | MC13 | 2 | 7 | I/O | (b) | TFF | RESET | |||
F1HzCnt<11> | 2 | 13 | FB2 | MC14 | 2 | 9 | I/O | (b) | TFF | RESET | |||
F1HzCnt<10> | 2 | 12 | FB2 | MC15 | 2 | 10 | I/O | I | TFF | PU | RESET | ||
MachineState_FFd2 | 4 | 7 | FB4 | MC4 | 2 | 14 | I/O | (b) | TFF | RESET | |||
MachineState_FFd3 | 5 | 7 | FB4 | MC5 | 2 | 15 | I/O | (b) | DFF | RESET | |||
F1HzEnable | 4 | 5 | FB4 | MC6 | 2 | 16 | I/O | (b) | DFF | RESET | |||
Clr | 2 | 5 | FB4 | MC12 | 2 | 17 | I/O | (b) | DFF | RESET | |||
HzRange | 2 | 4 | FB4 | MC14 | 2 | 18 | I/O | (b) | TFF | RESET | |||
RangeKeyStatus | 2 | 4 | FB7 | MC16 | 1 | 19 | I/O | (b) | LATCH | RESET | |||
Cnt10<3> | 4 | 11 | FB5 | MC14 | 1 | 28 | I/O | (b) | TFF | RESET | |||
R10<0> | 3 | 4 | FB5 | MC6 | 1 | 30 | I/O/GCK0 | (b) | DEFF | RESET | |||
R10<1> | 3 | 4 | FB5 | MC5 | 1 | 31 | I/O | (b) | DEFF | RESET | |||
R10<2> | 3 | 4 | FB5 | MC4 | 1 | 32 | I/O/GCK1 | (b) | DEFF | RESET | |||
R10<3> | 3 | 4 | FB5 | MC2 | 1 | 33 | I/O | (b) | DEFF | RESET | |||
R100<3> | 3 | 4 | FB6 | MC1 | 1 | 34 | I/O | (b) | DEFF | RESET | |||
R100<2> | 3 | 4 | FB6 | MC2 | 1 | 35 | I/O/CDR | (b) | DEFF | RESET | |||
R100<1> | 3 | 4 | FB6 | MC4 | 1 | 38 | I/O/GCK2 | GCK | DEFF | PU | RESET | ||
R100<0> | 3 | 4 | FB6 | MC12 | 1 | 39 | I/O/DGE | I | DEFF | PU | RESET | ||
R1000<3> | 3 | 4 | FB6 | MC13 | 1 | 40 | I/O | (b) | DEFF | RESET | |||
R1000<2> | 3 | 4 | FB6 | MC14 | 1 | 41 | I/O | (b) | DEFF | RESET | |||
R1000<1> | 3 | 4 | FB6 | MC15 | 1 | 42 | I/O | (b) | DEFF | RESET | |||
R1000<0> | 3 | 4 | FB6 | MC16 | 1 | 43 | I/O | (b) | DEFF | RESET | |||
Seg_B | 4 | 5 | FB16 | MC16 | FAST | 1 | 53 | I/O | O | LVCMOS18 | |||
Seg_F | 4 | 5 | FB16 | MC15 | FAST | 1 | 54 | I/O | O | LVCMOS18 | |||
Seg_A | 5 | 5 | FB16 | MC13 | FAST | 1 | 56 | I/O | O | LVCMOS18 | |||
Seg_E | 4 | 5 | FB16 | MC12 | FAST | 1 | 57 | I/O | O | LVCMOS18 | |||
Seg_D | 5 | 5 | FB16 | MC11 | FAST | 1 | 58 | I/O | O | LVCMOS18 | |||
Seg_K | 2 | 3 | FB16 | MC6 | FAST | 1 | 59 | I/O | O | LVCMOS18 | |||
Seg_C | 4 | 5 | FB16 | MC5 | FAST | 1 | 60 | I/O | O | LVCMOS18 | |||
Seg_G | 4 | 5 | FB14 | MC16 | FAST | 1 | 61 | I/O | O | LVCMOS18 | |||
RunLed | 3 | 3 | FB14 | MC4 | FAST | 1 | 69 | I/O | O | TFF | LVCMOS18 | RESET | |
RangeKInstance/ShRegister<0> | 2 | 2 | FB12 | MC15 | 2 | 94 | I/O | IR | DFF | PU | |||
DSel0 | 1 | 2 | FB11 | MC13 | FAST | 2 | 126 | I/O | O | LVCMOS18 | |||
DSel1 | 1 | 2 | FB11 | MC14 | FAST | 2 | 128 | I/O | O | LVCMOS18 | |||
DSel2 | 1 | 2 | FB11 | MC15 | FAST | 2 | 129 | I/O | O | LVCMOS18 | |||
DSel3 | 1 | 2 | FB11 | MC16 | FAST | 2 | 130 | I/O | O | LVCMOS18 | |||
Cnt1000<2> | 3 | 17 | FB3 | MC16 | 2 | 131 | I/O | (b) | TFF | RESET | |||
Cnt1000<0> | 3 | 15 | FB3 | MC14 | 2 | 132 | I/O | (b) | TFF | RESET | |||
Cnt100<3> | 4 | 15 | FB3 | MC5 | 2 | 133 | I/O | (b) | TFF | RESET | |||
Cnt100<1> | 5 | 15 | FB3 | MC3 | 2 | 134 | I/O | (b) | TFF | RESET | |||
Cnt100<2> | 3 | 13 | FB3 | MC2 | 2 | 135 | I/O | (b) | TFF | RESET | |||
Cnt100<0> | 3 | 11 | FB3 | MC1 | 2 | 136 | I/O | (b) | TFF | RESET | |||
GoKInstance/ShRegister<3> | 3 | 3 | FB1 | MC14 | 2 | 137 | I/O | (b) | DFF | RESET | |||
GoKeyStatus | 2 | 4 | FB1 | MC13 | 2 | 138 | I/O | (b) | LATCH | RESET | |||
RangeKInstance/ShRegister<1> | 3 | 3 | FB1 | MC12 | 2 | 139 | I/O | (b) | DFF | RESET | |||
RangeKInstance/ShRegister<2> | 3 | 3 | FB1 | MC6 | 2 | 140 | I/O | (b) | DFF | RESET | |||
RangeKInstance/ShRegister<3> | 3 | 3 | FB1 | MC4 | 2 | 142 | I/O | (b) | DFF | RESET | |||
GoKInstance/ShRegister<0>.COMB | 21 | 3 | FB1 | MC3 | 2 | 143 | I/O/GSR | IR | DFF | PU | |||
GoKInstance/ShRegister<2> | 3 | 3 | FB1 | MC1 | (b) | (b) | RESET | ||||||
GoKInstance/ShRegister<1> | 3 | 3 | FB1 | MC2 | (b) | (b) | RESET | ||||||
FClk | 2 | 8 | FB1 | MC5 | (b) | (b) | RESET | ||||||
FDivInstance/FDivCnt<6> | 2 | 7 | FB1 | MC7 | (b) | (b) | RESET | ||||||
FDivInstance/FDivCnt<5> | 2 | 6 | FB1 | MC8 | (b) | (b) | RESET | ||||||
FDivInstance/FDivCnt<4> | 2 | 5 | FB1 | MC9 | (b) | (b) | RESET | ||||||
FDivInstance/FDivCnt<3> | 2 | 4 | FB1 | MC10 | (b) | (b) | RESET | ||||||
FDivInstance/FDivCnt<2> | 2 | 3 | FB1 | MC11 | (b) | (b) | RESET | ||||||
FDivInstance/FDivCnt<1> | 2 | 2 | FB1 | MC15 | (b) | (b) | RESET | ||||||
FDivInstance/FDivCnt<0> | 1 | 1 | FB1 | MC16 | (b) | (b) | RESET | ||||||
F1HzCnt<8> | 2 | 10 | FB2 | MC2 | (b) | (b) | RESET | ||||||
F1HzCnt<7> | 2 | 9 | FB2 | MC6 | (b) | (b) | RESET | ||||||
F1HzCnt<5> | 2 | 7 | FB2 | MC7 | (b) | (b) | RESET | ||||||
F1HzCnt<4> | 2 | 6 | FB2 | MC8 | (b) | (b) | RESET | ||||||
F1HzCnt<3> | 2 | 5 | FB2 | MC9 | (b) | (b) | RESET | ||||||
F1HzCnt<2> | 2 | 4 | FB2 | MC10 | (b) | (b) | RESET | ||||||
F1HzCnt<1> | 2 | 3 | FB2 | MC11 | (b) | (b) | RESET | ||||||
F1HzCnt<0> | 2 | 2 | FB2 | MC16 | (b) | (b) | RESET | ||||||
Cnt1000<1> | 5 | 19 | FB3 | MC4 | (b) | (b) | RESET | ||||||
Cnt1000<3> | 4 | 19 | FB3 | MC6 | (b) | (b) | RESET | ||||||
Cnt10000<0> | 3 | 19 | FB3 | MC7 | (b) | (b) | RESET | ||||||
Cnt10000<2> | 3 | 21 | FB3 | MC8 | (b) | (b) | RESET | ||||||
Cnt10000<1> | 5 | 23 | FB3 | MC9 | (b) | (b) | RESET | ||||||
Cnt10000<3> | 4 | 23 | FB3 | MC10 | (b) | (b) | RESET | ||||||
Cnt100000<0> | 3 | 23 | FB3 | MC11 | (b) | (b) | RESET | ||||||
Cnt100000<2> | 3 | 25 | FB3 | MC12 | (b) | (b) | RESET | ||||||
Cnt100000<3> | 4 | 27 | FB3 | MC13 | (b) | (b) | RESET | ||||||
Cnt100000<1> | 5 | 27 | FB3 | MC15 | (b) | (b) | RESET | ||||||
MachineState_FFd1 | 3 | 4 | FB4 | MC7 | (b) | (b) | RESET | ||||||
MuxDisplInstance/SelCnt<0> | 2 | 2 | FB4 | MC8 | (b) | (b) | RESET | ||||||
MuxDisplInstance/SelCnt<1> | 3 | 3 | FB4 | MC9 | (b) | (b) | RESET | ||||||
MuxDisplInstance/Tetr<3> | 8 | 9 | FB4 | MC10 | (b) | (b) | |||||||
MuxDisplInstance/Tetr<2> | 8 | 9 | FB4 | MC11 | (b) | (b) | |||||||
MuxDisplInstance/Tetr<1> | 8 | 9 | FB4 | MC13 | (b) | (b) | |||||||
MuxDisplInstance/Tetr<0> | 8 | 9 | FB4 | MC15 | (b) | (b) | |||||||
MuxDisplInstance/Blank | 5 | 23 | FB4 | MC16 | (b) | (b) | |||||||
Cnt10<1> | 5 | 11 | FB5 | MC1 | (b) | (b) | RESET | ||||||
Cnt10<2> | 3 | 9 | FB5 | MC3 | (b) | (b) | RESET | ||||||
Cnt1<3> | 4 | 7 | FB5 | MC7 | (b) | (b) | RESET | ||||||
Cnt10<0> | 3 | 7 | FB5 | MC8 | (b) | (b) | RESET | ||||||
Cnt1<1> | 4 | 7 | FB5 | MC9 | (b) | (b) | RESET | ||||||
Cnt1<2> | 3 | 5 | FB5 | MC10 | (b) | (b) | RESET | ||||||
Cnt1<0> | 3 | 3 | FB5 | MC11 | (b) | (b) | RESET | ||||||
F1HzCnt<9> | 3 | 22 | FB5 | MC12 | (b) | (b) | RESET | ||||||
F1HzCnt<19> | 3 | 22 | FB5 | MC13 | (b) | (b) | RESET | ||||||
F1HzCnt<18> | 3 | 22 | FB5 | MC15 | (b) | (b) | RESET | ||||||
F1HzCnt<6> | 9 | 22 | FB5 | MC16 | (b) | (b) | RESET | ||||||
R10000<3> | 3 | 4 | FB6 | MC3 | (b) | (b) | RESET | ||||||
R10000<2> | 3 | 4 | FB6 | MC5 | (b) | (b) | RESET | ||||||
R10000<1> | 3 | 4 | FB6 | MC6 | (b) | (b) | RESET | ||||||
R10000<0> | 3 | 4 | FB6 | MC7 | (b) | (b) | RESET | ||||||
R100000<3> | 3 | 4 | FB6 | MC8 | (b) | (b) | RESET | ||||||
R100000<2> | 3 | 4 | FB6 | MC9 | (b) | (b) | RESET | ||||||
R100000<1> | 3 | 4 | FB6 | MC10 | (b) | (b) | RESET | ||||||
R100000<0> | 3 | 4 | FB6 | MC11 | (b) | (b) | RESET | ||||||
R1<3> | 3 | 4 | FB7 | MC1 | (b) | (b) | RESET | ||||||
R1<2> | 3 | 4 | FB7 | MC2 | (b) | (b) | RESET | ||||||
R1<1> | 3 | 4 | FB7 | MC3 | (b) | (b) | RESET | ||||||
R1<0> | 3 | 4 | FB7 | MC4 | (b) | (b) | RESET | ||||||
FDiv<0> | 2 | 2 | FB7 | MC7 | (b) | (b) | RESET | ||||||
FDiv<1> | 3 | 3 | FB7 | MC8 | (b) | (b) | RESET | ||||||
FDiv<2> | 3 | 4 | FB7 | MC9 | (b) | (b) | RESET | ||||||
FDiv<3> | 3 | 5 | FB7 | MC10 | (b) | (b) | RESET |