Design Name | Generator |
Fitting Status | Successful |
Software Version | J.36 |
Device Used | XC2C256-6-VQ100 |
Date | 3-30-2010, 11:18PM |
Macrocells Used | Pterms Used | Registers Used | Pins Used | Function Block Inputs Used |
---|---|---|---|---|
95/256 (38%) | 284/896 (32%) | 64/256 (25%) | 21/80 (27%) | 193/640 (31%) |
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Signal mapped onto global clock net (GCK0) | Clk |