********** Mapped Logic ********** |
ClrPresc_or0000 <= ((Reset AND Context_FFd2)
OR (Reset AND NOT Context_FFd1)); |
FDCPE_Context_FFd1: FDCPE port map (Context_FFd1,Context_FFd2,NOT Clk,NOT Reset,'0',Context_FFd1_CE);
Context_FFd1_CE <= (MachineState_FFd2 AND MachineState_FFd1); |
FDCPE_Context_FFd2: FDCPE port map (Context_FFd2,NOT Context_FFd1,NOT Clk,NOT Reset,'0',Context_FFd2_CE);
Context_FFd2_CE <= (MachineState_FFd2 AND MachineState_FFd1); |
DSel0 <= (NOT MuxDisplInstance/SelCnt(0) AND
NOT MuxDisplInstance/SelCnt(1)); |
DSel1 <= (MuxDisplInstance/SelCnt(0) AND
NOT MuxDisplInstance/SelCnt(1)); |
DSel2 <= (NOT MuxDisplInstance/SelCnt(0) AND
MuxDisplInstance/SelCnt(1)); |
DSel3 <= (MuxDisplInstance/SelCnt(0) AND
MuxDisplInstance/SelCnt(1)); |
FTCPE_DispMode: FTCPE port map (DispMode,DispMode_T,NOT Clk,NOT Reset,'0','1');
DispMode_T <= ((NOT Context_FFd2 AND NOT Context_FFd1 AND MachineState_FFd2 AND NOT MachineState_FFd1) OR (NOT Context_FFd2 AND NOT Context_FFd1 AND MachineState_FFd2 AND NOT DispMode)); |
FTCPE_F1HzDivInstance/FDivCnt0: FTCPE port map (F1HzDivInstance/FDivCnt(0),'0',NOT Clk,NOT ClrPresc_or0000,'0','1'); |
FTCPE_F1HzDivInstance/FDivCnt1: FTCPE port map (F1HzDivInstance/FDivCnt(1),F1HzDivInstance/FDivCnt(0),NOT Clk,NOT ClrPresc_or0000,'0','1'); |
FTCPE_F1HzDivInstance/FDivCnt2: FTCPE port map (F1HzDivInstance/FDivCnt(2),F1HzDivInstance/FDivCnt_T(2),NOT Clk,NOT ClrPresc_or0000,'0','1');
F1HzDivInstance/FDivCnt_T(2) <= (F1HzDivInstance/FDivCnt(0) AND F1HzDivInstance/FDivCnt(1)); |
FTCPE_F1HzDivInstance/FDivCnt3: FTCPE port map (F1HzDivInstance/FDivCnt(3),F1HzDivInstance/FDivCnt_T(3),NOT Clk,NOT ClrPresc_or0000,'0','1');
F1HzDivInstance/FDivCnt_T(3) <= (F1HzDivInstance/FDivCnt(0) AND F1HzDivInstance/FDivCnt(1) AND F1HzDivInstance/FDivCnt(2)); |
FTCPE_F1HzDivInstance/FDivCnt4: FTCPE port map (F1HzDivInstance/FDivCnt(4),F1HzDivInstance/FDivCnt_T(4),NOT Clk,NOT ClrPresc_or0000,'0','1');
F1HzDivInstance/FDivCnt_T(4) <= (F1HzDivInstance/FDivCnt(0) AND F1HzDivInstance/FDivCnt(1) AND F1HzDivInstance/FDivCnt(2) AND F1HzDivInstance/FDivCnt(3)); |
FTCPE_F1HzDivInstance/FDivCnt5: FTCPE port map (F1HzDivInstance/FDivCnt(5),F1HzDivInstance/FDivCnt_T(5),NOT Clk,NOT ClrPresc_or0000,'0','1');
F1HzDivInstance/FDivCnt_T(5) <= (F1HzDivInstance/FDivCnt(0) AND F1HzDivInstance/FDivCnt(1) AND F1HzDivInstance/FDivCnt(2) AND F1HzDivInstance/FDivCnt(3) AND F1HzDivInstance/FDivCnt(4)); |
FTCPE_F1HzDivInstance/FDivCnt6: FTCPE port map (F1HzDivInstance/FDivCnt(6),F1HzDivInstance/FDivCnt_T(6),NOT Clk,NOT ClrPresc_or0000,'0','1');
F1HzDivInstance/FDivCnt_T(6) <= (F1HzDivInstance/FDivCnt(0) AND F1HzDivInstance/FDivCnt(1) AND F1HzDivInstance/FDivCnt(2) AND F1HzDivInstance/FDivCnt(3) AND F1HzDivInstance/FDivCnt(4) AND F1HzDivInstance/FDivCnt(5)); |
FTCPE_F1HzDivInstance/FDivCnt7: FTCPE port map (F1HzDivInstance/FDivCnt(7),F1HzDivInstance/FDivCnt_T(7),NOT Clk,NOT ClrPresc_or0000,'0','1');
F1HzDivInstance/FDivCnt_T(7) <= (F1HzDivInstance/FDivCnt(0) AND F1HzDivInstance/FDivCnt(1) AND F1HzDivInstance/FDivCnt(2) AND F1HzDivInstance/FDivCnt(3) AND F1HzDivInstance/FDivCnt(4) AND F1HzDivInstance/FDivCnt(5) AND F1HzDivInstance/FDivCnt(6)); |
FTCPE_F1HzDivInstance/FDivCnt8: FTCPE port map (F1HzDivInstance/FDivCnt(8),F1HzDivInstance/FDivCnt_T(8),NOT Clk,NOT ClrPresc_or0000,'0','1');
F1HzDivInstance/FDivCnt_T(8) <= (F1HzDivInstance/FDivCnt(0) AND F1HzDivInstance/FDivCnt(1) AND F1HzDivInstance/FDivCnt(2) AND F1HzDivInstance/FDivCnt(3) AND F1HzDivInstance/FDivCnt(4) AND F1HzDivInstance/FDivCnt(5) AND F1HzDivInstance/FDivCnt(6) AND F1HzDivInstance/FDivCnt(7)); |
FTCPE_F1HzDivInstance/FDivCnt9: FTCPE port map (F1HzDivInstance/FDivCnt(9),F1HzDivInstance/FDivCnt_T(9),NOT Clk,NOT ClrPresc_or0000,'0','1');
F1HzDivInstance/FDivCnt_T(9) <= (F1HzDivInstance/FDivCnt(0) AND F1HzDivInstance/FDivCnt(1) AND F1HzDivInstance/FDivCnt(2) AND F1HzDivInstance/FDivCnt(3) AND F1HzDivInstance/FDivCnt(4) AND F1HzDivInstance/FDivCnt(5) AND F1HzDivInstance/FDivCnt(6) AND F1HzDivInstance/FDivCnt(7) AND F1HzDivInstance/FDivCnt(8)); |
FTCPE_F1HzDivInstance/FDivCnt10: FTCPE port map (F1HzDivInstance/FDivCnt(10),F1HzDivInstance/FDivCnt_T(10),NOT Clk,NOT ClrPresc_or0000,'0','1');
F1HzDivInstance/FDivCnt_T(10) <= (F1HzDivInstance/FDivCnt(0) AND F1HzDivInstance/FDivCnt(1) AND F1HzDivInstance/FDivCnt(2) AND F1HzDivInstance/FDivCnt(3) AND F1HzDivInstance/FDivCnt(4) AND F1HzDivInstance/FDivCnt(5) AND F1HzDivInstance/FDivCnt(6) AND F1HzDivInstance/FDivCnt(7) AND F1HzDivInstance/FDivCnt(8) AND F1HzDivInstance/FDivCnt(9)); |
FTCPE_F1HzDivInstance/FDivCnt11: FTCPE port map (F1HzDivInstance/FDivCnt(11),F1HzDivInstance/FDivCnt_T(11),NOT Clk,NOT ClrPresc_or0000,'0','1');
F1HzDivInstance/FDivCnt_T(11) <= (F1HzDivInstance/FDivCnt(0) AND F1HzDivInstance/FDivCnt(10) AND F1HzDivInstance/FDivCnt(1) AND F1HzDivInstance/FDivCnt(2) AND F1HzDivInstance/FDivCnt(3) AND F1HzDivInstance/FDivCnt(4) AND F1HzDivInstance/FDivCnt(5) AND F1HzDivInstance/FDivCnt(6) AND F1HzDivInstance/FDivCnt(7) AND F1HzDivInstance/FDivCnt(8) AND F1HzDivInstance/FDivCnt(9)); |
FTCPE_F1HzDivInstance/FDivCnt12: FTCPE port map (F1HzDivInstance/FDivCnt(12),F1HzDivInstance/FDivCnt_T(12),NOT Clk,NOT ClrPresc_or0000,'0','1');
F1HzDivInstance/FDivCnt_T(12) <= (F1HzDivInstance/FDivCnt(0) AND F1HzDivInstance/FDivCnt(10) AND F1HzDivInstance/FDivCnt(1) AND F1HzDivInstance/FDivCnt(2) AND F1HzDivInstance/FDivCnt(3) AND F1HzDivInstance/FDivCnt(4) AND F1HzDivInstance/FDivCnt(5) AND F1HzDivInstance/FDivCnt(6) AND F1HzDivInstance/FDivCnt(7) AND F1HzDivInstance/FDivCnt(8) AND F1HzDivInstance/FDivCnt(9) AND F1HzDivInstance/FDivCnt(11)); |
FTCPE_F1HzDivInstance/FDivCnt13: FTCPE port map (F1HzDivInstance/FDivCnt(13),F1HzDivInstance/FDivCnt_T(13),NOT Clk,NOT ClrPresc_or0000,'0','1');
F1HzDivInstance/FDivCnt_T(13) <= (F1HzDivInstance/FDivCnt(0) AND F1HzDivInstance/FDivCnt(10) AND F1HzDivInstance/FDivCnt(1) AND F1HzDivInstance/FDivCnt(2) AND F1HzDivInstance/FDivCnt(3) AND F1HzDivInstance/FDivCnt(4) AND F1HzDivInstance/FDivCnt(5) AND F1HzDivInstance/FDivCnt(6) AND F1HzDivInstance/FDivCnt(7) AND F1HzDivInstance/FDivCnt(8) AND F1HzDivInstance/FDivCnt(9) AND F1HzDivInstance/FDivCnt(11) AND F1HzDivInstance/FDivCnt(12)); |
FTCPE_F1Hz: FTCPE port map (F1Hz,F1Hz_T,NOT Clk,NOT ClrPresc_or0000,'0','1');
F1Hz_T <= (F1HzDivInstance/FDivCnt(0) AND F1HzDivInstance/FDivCnt(10) AND F1HzDivInstance/FDivCnt(1) AND F1HzDivInstance/FDivCnt(2) AND F1HzDivInstance/FDivCnt(3) AND F1HzDivInstance/FDivCnt(4) AND F1HzDivInstance/FDivCnt(5) AND F1HzDivInstance/FDivCnt(6) AND F1HzDivInstance/FDivCnt(7) AND F1HzDivInstance/FDivCnt(8) AND F1HzDivInstance/FDivCnt(9) AND F1HzDivInstance/FDivCnt(11) AND F1HzDivInstance/FDivCnt(12) AND F1HzDivInstance/FDivCnt(13)); |
FTCPE_FClk: FTCPE port map (FClk,FClk_T,NOT Clk,NOT Reset,'0','1');
FClk_T <= (FDivInstance/FDivCnt(0) AND FDivInstance/FDivCnt(1)); |
FTCPE_FDiv0: FTCPE port map (FDiv(0),'0',FClk,NOT Reset,'0','1'); |
FTCPE_FDiv1: FTCPE port map (FDiv(1),FDiv(0),FClk,NOT Reset,'0','1'); |
FTCPE_FDiv2: FTCPE port map (FDiv(2),FDiv_T(2),FClk,NOT Reset,'0','1');
FDiv_T(2) <= (FDiv(0) AND FDiv(1)); |
FTCPE_FDiv3: FTCPE port map (FDiv(3),FDiv_T(3),FClk,NOT Reset,'0','1');
FDiv_T(3) <= (FDiv(0) AND FDiv(1) AND FDiv(2)); |
FTCPE_FDiv4: FTCPE port map (FDiv(4),FDiv_T(4),FClk,NOT Reset,'0','1');
FDiv_T(4) <= (FDiv(3) AND FDiv(0) AND FDiv(1) AND FDiv(2)); |
FTCPE_FDivInstance/FDivCnt0: FTCPE port map (FDivInstance/FDivCnt(0),'0',NOT Clk,NOT Reset,'0','1'); |
FTCPE_FDivInstance/FDivCnt1: FTCPE port map (FDivInstance/FDivCnt(1),FDivInstance/FDivCnt(0),NOT Clk,NOT Reset,'0','1'); |
FTCPE_Hrs10: FTCPE port map (Hrs1(0),N_PZ_452,N_PZ_400,NOT Reset,'0','1'); |
FTCPE_Hrs1: FTCPE port map (Hrs(1),Hrs_T(1),N_PZ_400,NOT Reset,'0','1');
Hrs_T(1) <= (Hrs1(0) AND N_PZ_452); |
FTCPE_Hrs2: FTCPE port map (Hrs(2),Hrs_T(2),N_PZ_400,NOT Reset,'0','1');
Hrs_T(2) <= (Hrs(1) AND Hrs1(0) AND N_PZ_452); |
FTCPE_Hrs3: FTCPE port map (Hrs(3),Hrs_T(3),N_PZ_400,NOT Reset,'0','1');
Hrs_T(3) <= ((Hrs(1) AND Hrs1(0) AND N_PZ_452 AND Hrs(2) AND Hrs(3)) OR (Hrs(1) AND Hrs1(0) AND N_PZ_452 AND Hrs(2) AND NOT Hrs(4)) OR (Hrs(1) AND Hrs1(0) AND N_PZ_452 AND Hrs(2) AND Hrs(5))); |
FTCPE_Hrs4: FTCPE port map (Hrs(4),Hrs_T(4),N_PZ_400,NOT Reset,'0','1');
Hrs_T(4) <= ((Hrs(1) AND Hrs1(0) AND N_PZ_452 AND Hrs(2) AND Hrs(3)) OR (Hrs(1) AND Hrs1(0) AND N_PZ_452 AND Hrs(2) AND Hrs(4) AND NOT Hrs(5))); |
FTCPE_Hrs5: FTCPE port map (Hrs(5),Hrs_T(5),N_PZ_400,NOT Reset,'0','1');
Hrs_T(5) <= (Hrs(1) AND Hrs1(0) AND N_PZ_452 AND Hrs(2) AND Hrs(3) AND Hrs(4)); |
MCnvInstance/B(1) <= ((Min(3) AND Min(5))
OR (NOT Min(3) AND NOT Min(5)) OR (Min(2) AND NOT Min(4) AND Min(5)) OR (NOT Min(2) AND Min(4) AND NOT Min(5))); |
MCnvInstance/B(2) <= ((NOT Min(3) AND Min(5) AND MCnvInstance/B(1))
OR (Min(4) AND MCnvInstance/B(1) AND NOT N_PZ_435)); |
FDCPE_MachineState_FFd1: FDCPE port map (MachineState_FFd1,MachineState_FFd1_D,NOT Clk,NOT Reset,'0','1');
MachineState_FFd1_D <= NOT (((NOT MachineState_FFd2 AND NOT MachineState_FFd1 AND ModeKeyStatus) OR (NOT MachineState_FFd2 AND NOT ModeKeyStatus AND NOT SetupKeyStatus))); |
FDCPE_MachineState_FFd2: FDCPE port map (MachineState_FFd2,MachineState_FFd2_D,NOT Clk,NOT Reset,'0','1');
MachineState_FFd2_D <= ((NOT MachineState_FFd2 AND NOT MachineState_FFd1 AND ModeKeyStatus) OR (NOT MachineState_FFd2 AND NOT MachineState_FFd1 AND SetupKeyStatus)); |
FTCPE_Min10: FTCPE port map (Min1(0),N_PZ_524,N_PZ_403,NOT Reset,'0','1'); |
FTCPE_Min1: FTCPE port map (Min(1),Min_T(1),N_PZ_403,NOT Reset,'0','1');
Min_T(1) <= (Min1(0) AND N_PZ_524); |
FTCPE_Min2: FTCPE port map (Min(2),Min_T(2),N_PZ_403,NOT Reset,'0','1');
Min_T(2) <= (Min(1) AND Min1(0) AND N_PZ_524) XOR (Min(1) AND Min1(0) AND N_PZ_524 AND MCnvInstance/B(2) AND Min(4) AND Min(5)); |
FTCPE_Min3: FTCPE port map (Min(3),Min_T(3),N_PZ_403,NOT Reset,'0','1');
Min_T(3) <= ((Min(1) AND Min1(0) AND N_PZ_524 AND Min(2)) OR (Min(1) AND Min1(0) AND N_PZ_524 AND Min(3) AND Min(4) AND Min(5))); |
FTCPE_Min4: FTCPE port map (Min(4),Min_T(4),N_PZ_403,NOT Reset,'0','1');
Min_T(4) <= ((Min(1) AND Min1(0) AND N_PZ_524 AND Min(3) AND Min(2)) OR (Min(1) AND Min1(0) AND N_PZ_524 AND Min(3) AND Min(4) AND Min(5))); |
FTCPE_Min5: FTCPE port map (Min(5),Min_T(5),N_PZ_403,NOT Reset,'0','1');
Min_T(5) <= ((Min(1) AND Min1(0) AND N_PZ_524 AND Min(3) AND Min(2) AND Min(4)) OR (Min(1) AND Min1(0) AND N_PZ_524 AND Min(3) AND Min(4) AND Min(5))); |
FDCPE_ModeKeyInstance/ShRegister0: FDCPE port map (ModeKeyInstance/ShRegister(0),ModeKeyInp,FDiv(4),'0',NOT Reset,'1'); |
FDCPE_ModeKeyInstance/ShRegister1: FDCPE port map (ModeKeyInstance/ShRegister(1),ModeKeyInstance/ShRegister(0),FDiv(4),'0',NOT Reset,'1'); |
FDCPE_ModeKeyInstance/ShRegister2: FDCPE port map (ModeKeyInstance/ShRegister(2),ModeKeyInstance/ShRegister(1),FDiv(4),'0',NOT Reset,'1'); |
FDCPE_ModeKeyInstance/ShRegister3: FDCPE port map (ModeKeyInstance/ShRegister(3),ModeKeyInstance/ShRegister(2),FDiv(4),'0',NOT Reset,'1'); |
LDCP_ModeKeyStatus: LDCP port map (ModeKeyStatus,NOT '0',,ModeKeyStatus_CLR,'0');
ModeKeyStatus_G <= (NOT ModeKeyInstance/ShRegister(0) AND NOT ModeKeyInstance/ShRegister(1) AND NOT ModeKeyInstance/ShRegister(2) AND NOT ModeKeyInstance/ShRegister(3)); ModeKeyStatus_CLR <= (ModeKeyInstance/ShRegister(0) AND ModeKeyInstance/ShRegister(1) AND ModeKeyInstance/ShRegister(2) AND ModeKeyInstance/ShRegister(3)); |
MuxDisplInstance/Mmux_Tetr_I1_Result10 <= ((Min(1) AND N_PZ_390 AND NOT N_PZ_453)
OR (NOT Min(1) AND MCnvInstance/B(2) AND N_PZ_390) OR (MCnvInstance/B(1) AND N_PZ_390 AND NOT N_PZ_453) OR (NOT MuxDisplInstance/SelCnt(0) AND MuxDisplInstance/SelCnt(1) AND NOT N_PZ_390 AND NOT Hrs(1) AND NOT N_PZ_382 AND N_PZ_455) OR (NOT MuxDisplInstance/SelCnt(0) AND MuxDisplInstance/SelCnt(1) AND NOT N_PZ_390 AND N_PZ_382 AND Hrs(2) AND NOT Hrs(4)) OR (NOT MuxDisplInstance/SelCnt(0) AND MuxDisplInstance/SelCnt(1) AND NOT N_PZ_390 AND N_PZ_382 AND Hrs(3) AND NOT Hrs(5)) OR (NOT MuxDisplInstance/SelCnt(0) AND NOT MuxDisplInstance/SelCnt(1) AND Sec(2) AND NOT Sec(4) AND NOT N_PZ_399 AND NOT N_PZ_390) OR (NOT MuxDisplInstance/SelCnt(0) AND MuxDisplInstance/SelCnt(1) AND NOT N_PZ_390 AND Hrs(1) AND Hrs(2) AND Hrs(3) AND NOT Hrs(4)) OR (NOT MuxDisplInstance/SelCnt(0) AND MuxDisplInstance/SelCnt(1) AND NOT N_PZ_390 AND NOT Hrs(1) AND Hrs(2) AND NOT Hrs(4) AND Hrs(5)) OR (NOT MuxDisplInstance/SelCnt(0) AND NOT MuxDisplInstance/SelCnt(1) AND Sec(1) AND NOT Sec(2) AND NOT Sec(4) AND N_PZ_399 AND NOT N_PZ_390) OR (NOT MuxDisplInstance/SelCnt(0) AND NOT MuxDisplInstance/SelCnt(1) AND Sec(1) AND NOT Sec(4) AND NOT Sec(5) AND N_PZ_399 AND NOT N_PZ_390) OR (NOT MuxDisplInstance/SelCnt(0) AND NOT MuxDisplInstance/SelCnt(1) AND NOT Sec(1) AND Sec(2) AND NOT Sec(4) AND Sec(5) AND NOT N_PZ_390) OR (NOT MuxDisplInstance/SelCnt(0) AND NOT MuxDisplInstance/SelCnt(1) AND NOT Sec(1) AND NOT Sec(2) AND Sec(4) AND N_PZ_399 AND NOT N_PZ_390) OR (NOT MuxDisplInstance/SelCnt(0) AND NOT MuxDisplInstance/SelCnt(1) AND NOT Sec(2) AND Sec(4) AND NOT Sec(5) AND NOT N_PZ_399 AND NOT N_PZ_390) OR (NOT MuxDisplInstance/SelCnt(0) AND MuxDisplInstance/SelCnt(1) AND NOT N_PZ_390 AND Hrs(1) AND NOT N_PZ_382 AND Hrs(2) AND Hrs(4) AND Hrs(5)) OR (NOT MuxDisplInstance/SelCnt(0) AND MuxDisplInstance/SelCnt(1) AND NOT N_PZ_390 AND Hrs(1) AND NOT N_PZ_382 AND NOT Hrs(2) AND NOT Hrs(4) AND Hrs(5)) OR (NOT MuxDisplInstance/SelCnt(0) AND NOT MuxDisplInstance/SelCnt(1) AND Sec(1) AND NOT Sec(3) AND Sec(4) AND Sec(5) AND N_PZ_399 AND NOT N_PZ_390)); |
FTCPE_MuxDisplInstance/SelCnt0: FTCPE port map (MuxDisplInstance/SelCnt(0),'0',FDiv(3),NOT Reset,'0','1'); |
FTCPE_MuxDisplInstance/SelCnt1: FTCPE port map (MuxDisplInstance/SelCnt(1),MuxDisplInstance/SelCnt(0),FDiv(3),NOT Reset,'0','1'); |
MuxDisplInstance/Tetr(0) <= ((MuxDisplInstance/SelCnt(1) AND N_PZ_494)
OR (NOT Min1(0) AND N_PZ_390) OR (NOT MuxDisplInstance/SelCnt(0) AND NOT Sec1(0) AND N_PZ_528) OR (NOT MuxDisplInstance/SelCnt(0) AND N_PZ_484 AND NOT Hrs1(0)) OR (NOT Sec(1) AND NOT N_PZ_399 AND NOT DispMode AND N_PZ_494) OR (DispMode AND NOT MCnvInstance/B(2) AND MCnvInstance/B(1) AND N_PZ_494) OR (Sec(3) AND Sec(5) AND NOT N_PZ_399 AND NOT DispMode AND N_PZ_494) OR (NOT Sec(3) AND NOT Sec(5) AND NOT N_PZ_399 AND NOT DispMode AND N_PZ_494) OR (DispMode AND NOT Min(1) AND NOT MCnvInstance/B(2) AND N_PZ_453 AND N_PZ_494) OR (NOT Sec(2) AND Sec(3) AND Sec(4) AND NOT N_PZ_399 AND NOT DispMode AND N_PZ_494)); |
MuxDisplInstance/Tetr(1) <= ((NOT Min(1) AND MCnvInstance/B(2) AND N_PZ_390)
OR (MuxDisplInstance/SelCnt(0) AND N_PZ_484 AND N_PZ_382 AND Hrs(4)) OR (Min(1) AND NOT MCnvInstance/B(2) AND MCnvInstance/B(1) AND N_PZ_390) OR (NOT Min(1) AND NOT MCnvInstance/B(1) AND N_PZ_390 AND NOT N_PZ_453) OR (N_PZ_435 AND NOT N_PZ_390 AND NOT N_PZ_484 AND NOT N_PZ_528) OR (MuxDisplInstance/SelCnt(0) AND NOT Sec(4) AND Sec(5) AND N_PZ_399 AND N_PZ_528) OR (MuxDisplInstance/SelCnt(0) AND N_PZ_484 AND NOT N_PZ_382 AND NOT Hrs(4) AND Hrs(5)) OR (MuxDisplInstance/SelCnt(0) AND N_PZ_484 AND Hrs(3) AND Hrs(4) AND NOT Hrs(5)) OR (NOT MuxDisplInstance/SelCnt(0) AND MuxDisplInstance/SelCnt(1) AND NOT N_PZ_390 AND Hrs(1) AND N_PZ_382) OR (NOT MuxDisplInstance/SelCnt(0) AND NOT MuxDisplInstance/SelCnt(1) AND NOT Sec(1) AND N_PZ_399 AND NOT N_PZ_390) OR (N_PZ_484 AND NOT Hrs(1) AND NOT N_PZ_382 AND NOT Hrs(4) AND Hrs(5)) OR (MuxDisplInstance/SelCnt(0) AND NOT MuxDisplInstance/SelCnt(1) AND Sec(3) AND Sec(4) AND NOT N_PZ_399 AND NOT DispMode) OR (MuxDisplInstance/SelCnt(0) AND NOT MuxDisplInstance/SelCnt(1) AND Sec(4) AND NOT Sec(5) AND NOT N_PZ_399 AND NOT DispMode) OR (NOT MuxDisplInstance/SelCnt(0) AND MuxDisplInstance/SelCnt(1) AND NOT N_PZ_390 AND NOT Hrs(1) AND NOT N_PZ_382 AND N_PZ_455) OR (NOT MuxDisplInstance/SelCnt(0) AND MuxDisplInstance/SelCnt(1) AND NOT N_PZ_390 AND NOT Hrs(1) AND NOT N_PZ_382 AND Hrs(2) AND NOT Hrs(4)) OR (NOT MuxDisplInstance/SelCnt(0) AND MuxDisplInstance/SelCnt(1) AND NOT N_PZ_390 AND NOT Hrs(1) AND NOT N_PZ_382 AND Hrs(2) AND Hrs(5)) OR (NOT MuxDisplInstance/SelCnt(0) AND NOT MuxDisplInstance/SelCnt(1) AND Sec(1) AND Sec(3) AND Sec(5) AND NOT N_PZ_399 AND NOT N_PZ_390) OR (NOT MuxDisplInstance/SelCnt(0) AND NOT MuxDisplInstance/SelCnt(1) AND Sec(1) AND NOT Sec(3) AND NOT Sec(5) AND NOT N_PZ_399 AND NOT N_PZ_390) OR (NOT MuxDisplInstance/SelCnt(1) AND Sec(1) AND NOT Sec(2) AND Sec(4) AND NOT Sec(5) AND NOT N_PZ_399 AND NOT DispMode)); |
MuxDisplInstance/Tetr(2) <= ((NOT MuxDisplInstance/SelCnt(0) AND
NOT MuxDisplInstance/Mmux_Tetr_I1_Result10) OR (NOT Sec(5) AND N_PZ_528 AND NOT MuxDisplInstance/Mmux_Tetr_I1_Result10) OR (N_PZ_484 AND NOT Hrs(5) AND NOT MuxDisplInstance/Mmux_Tetr_I1_Result10) OR (NOT Sec(3) AND NOT Sec(4) AND N_PZ_528 AND NOT MuxDisplInstance/Mmux_Tetr_I1_Result10) OR (NOT Min(5) AND NOT N_PZ_484 AND NOT N_PZ_528 AND NOT MuxDisplInstance/Mmux_Tetr_I1_Result10) OR (N_PZ_484 AND NOT Hrs(3) AND NOT Hrs(4) AND NOT MuxDisplInstance/Mmux_Tetr_I1_Result10) OR (NOT Min(3) AND NOT Min(4) AND NOT N_PZ_484 AND NOT N_PZ_528 AND NOT MuxDisplInstance/Mmux_Tetr_I1_Result10)); |
MuxDisplInstance/Tetr(3) <= ((Min(1) AND MCnvInstance/B(2) AND MCnvInstance/B(1) AND
N_PZ_390) OR (NOT Min(1) AND NOT MCnvInstance/B(1) AND N_PZ_390 AND N_PZ_453) OR (MCnvInstance/B(2) AND MCnvInstance/B(1) AND N_PZ_390 AND NOT N_PZ_453) OR (NOT MuxDisplInstance/SelCnt(0) AND MuxDisplInstance/SelCnt(1) AND NOT N_PZ_390 AND Hrs(1) AND NOT N_PZ_382 AND N_PZ_455) OR (NOT MuxDisplInstance/SelCnt(0) AND Sec(1) AND NOT Sec(2) AND Sec(4) AND N_PZ_399 AND NOT DispMode AND NOT N_PZ_390) OR (NOT MuxDisplInstance/SelCnt(0) AND MuxDisplInstance/SelCnt(1) AND NOT N_PZ_390 AND Hrs(1) AND NOT N_PZ_382 AND Hrs(2) AND NOT Hrs(4) AND Hrs(5)) OR (NOT MuxDisplInstance/SelCnt(0) AND MuxDisplInstance/SelCnt(1) AND NOT N_PZ_390 AND NOT Hrs(1) AND NOT N_PZ_382 AND NOT Hrs(2) AND NOT Hrs(4) AND NOT Hrs(5)) OR (NOT MuxDisplInstance/SelCnt(0) AND MuxDisplInstance/SelCnt(1) AND NOT N_PZ_390 AND NOT Hrs(1) AND NOT N_PZ_382 AND Hrs(3) AND Hrs(4) AND NOT Hrs(5)) OR (NOT MuxDisplInstance/SelCnt(0) AND MuxDisplInstance/SelCnt(1) AND NOT N_PZ_390 AND NOT Hrs(1) AND NOT Hrs(2) AND NOT Hrs(3) AND Hrs(4) AND Hrs(5)) OR (NOT MuxDisplInstance/SelCnt(0) AND Sec(1) AND Sec(2) AND NOT Sec(4) AND Sec(5) AND N_PZ_399 AND NOT DispMode AND NOT N_PZ_390) OR (NOT MuxDisplInstance/SelCnt(0) AND NOT Sec(1) AND Sec(2) AND Sec(3) AND NOT Sec(5) AND NOT N_PZ_399 AND NOT DispMode AND NOT N_PZ_390) OR (NOT MuxDisplInstance/SelCnt(0) AND NOT Sec(1) AND NOT Sec(2) AND Sec(4) AND Sec(5) AND NOT N_PZ_399 AND NOT DispMode AND NOT N_PZ_390) OR (NOT MuxDisplInstance/SelCnt(0) AND NOT Sec(1) AND Sec(3) AND NOT Sec(4) AND NOT Sec(5) AND NOT N_PZ_399 AND NOT DispMode AND NOT N_PZ_390)); |
N_PZ_382 <= ((Hrs(2) AND N_PZ_455)
OR (NOT Hrs(4) AND N_PZ_455) OR (NOT Hrs(2) AND Hrs(3) AND Hrs(4) AND NOT Hrs(5))); |
N_PZ_390 <= (NOT MuxDisplInstance/SelCnt(0) AND NOT N_PZ_484 AND NOT N_PZ_528); |
N_PZ_399 <= (NOT Sec(2) AND Sec(4))
XOR ((NOT Sec(3) AND Sec(5)) OR (Sec(2) AND Sec(3) AND NOT Sec(4) AND NOT Sec(5)) OR (NOT Sec(2) AND Sec(3) AND Sec(4) AND NOT Sec(5))); |
N_PZ_400 <= ((Context_FFd2 AND NOT Context_FFd1)
OR (NOT Context_FFd2 AND NOT N_PZ_403) OR (NOT ModeKeyStatus AND NOT N_PZ_403)); |
N_PZ_403 <= ((Context_FFd2 AND NOT Context_FFd1 AND ModeKeyStatus)
OR (NOT Context_FFd2 AND NOT Context_FFd1 AND F1Hz)); |
N_PZ_435 <= ((Min(3) AND Min(4) AND NOT Min(5))
OR (NOT Min(3) AND NOT Min(4) AND Min(5)) OR (Min(2) AND Min(4) AND MCnvInstance/B(1))); |
N_PZ_452 <= ((Context_FFd2 AND Context_FFd1)
OR (Sec(1) AND NOT Context_FFd2 AND NOT Context_FFd1 AND Sec1(0) AND NOT Sec(2) AND Sec(3) AND Sec(4) AND Sec(5) AND Min(1) AND Min1(0) AND Min(3) AND NOT Min(2) AND Min(4) AND Min(5))); |
N_PZ_453 <= ((Min(2) AND N_PZ_435)
OR (NOT Min(2) AND NOT N_PZ_435)); |
N_PZ_455 <= ((Hrs(3) AND Hrs(5))
OR (NOT Hrs(3) AND NOT Hrs(5))); |
N_PZ_484 <= (MuxDisplInstance/SelCnt(1) AND DispMode); |
N_PZ_494 <= ((MuxDisplInstance/SelCnt(0) AND
NOT MuxDisplInstance/SelCnt(1)) OR (MuxDisplInstance/SelCnt(0) AND DispMode AND N_PZ_382) OR (MuxDisplInstance/SelCnt(0) AND NOT DispMode AND NOT MCnvInstance/B(2) AND MCnvInstance/B(1)) OR (MuxDisplInstance/SelCnt(0) AND NOT DispMode AND NOT Min(1) AND NOT MCnvInstance/B(2) AND N_PZ_453) OR (MuxDisplInstance/SelCnt(0) AND DispMode AND NOT Hrs(1) AND Hrs(2) AND Hrs(3) AND Hrs(4)) OR (MuxDisplInstance/SelCnt(0) AND DispMode AND NOT Hrs(1) AND NOT Hrs(2) AND Hrs(3) AND NOT Hrs(4)) OR (MuxDisplInstance/SelCnt(0) AND DispMode AND NOT Hrs(1) AND NOT Hrs(2) AND NOT Hrs(3) AND Hrs(4) AND Hrs(5))); |
N_PZ_524 <= ((Context_FFd2 AND NOT Context_FFd1)
OR (Sec(1) AND NOT Context_FFd1 AND Sec1(0) AND NOT Sec(2) AND Sec(3) AND Sec(4) AND Sec(5))); |
N_PZ_528 <= (NOT MuxDisplInstance/SelCnt(1) AND NOT DispMode); |
FTCPE_Sec10: FTCPE port map (Sec1(0),Sec1_T(0),F1Hz,NOT ClrPresc_or0000,'0','1');
Sec1_T(0) <= (NOT Context_FFd2 AND NOT Context_FFd1); |
FTCPE_Sec1: FTCPE port map (Sec(1),Sec_T(1),F1Hz,NOT ClrPresc_or0000,'0','1');
Sec_T(1) <= (NOT Context_FFd2 AND NOT Context_FFd1 AND Sec1(0)); |
FTCPE_Sec2: FTCPE port map (Sec(2),Sec_T(2),F1Hz,NOT ClrPresc_or0000,'0','1');
Sec_T(2) <= ((Sec(1) AND NOT Context_FFd2 AND NOT Context_FFd1 AND Sec1(0) AND NOT Sec(3)) OR (Sec(1) AND NOT Context_FFd2 AND NOT Context_FFd1 AND Sec1(0) AND NOT Sec(5)) OR (Sec(1) AND NOT Context_FFd2 AND NOT Context_FFd1 AND Sec1(0) AND NOT N_PZ_399)); |
FTCPE_Sec3: FTCPE port map (Sec(3),Sec_T(3),F1Hz,NOT ClrPresc_or0000,'0','1');
Sec_T(3) <= ((Sec(1) AND NOT Context_FFd2 AND NOT Context_FFd1 AND Sec1(0) AND Sec(2)) OR (Sec(1) AND NOT Context_FFd2 AND NOT Context_FFd1 AND Sec1(0) AND Sec(3) AND Sec(4) AND Sec(5))); |
FTCPE_Sec4: FTCPE port map (Sec(4),Sec_T(4),F1Hz,NOT ClrPresc_or0000,'0','1');
Sec_T(4) <= ((Sec(1) AND NOT Context_FFd2 AND NOT Context_FFd1 AND Sec1(0) AND Sec(2) AND Sec(3)) OR (Sec(1) AND NOT Context_FFd2 AND NOT Context_FFd1 AND Sec1(0) AND Sec(3) AND Sec(4) AND Sec(5))); |
FTCPE_Sec5: FTCPE port map (Sec(5),Sec_T(5),F1Hz,NOT ClrPresc_or0000,'0','1');
Sec_T(5) <= ((Sec(1) AND NOT Context_FFd2 AND NOT Context_FFd1 AND Sec1(0) AND Sec(2) AND Sec(3) AND Sec(4)) OR (Sec(1) AND NOT Context_FFd2 AND NOT Context_FFd1 AND Sec1(0) AND Sec(3) AND Sec(4) AND Sec(5))); |
Seg_A <= NOT ((NOT MuxDisplInstance/Tetr(1) AND
NOT MuxDisplInstance/Tetr(0)) XOR ((NOT MuxDisplInstance/Tetr(1) AND NOT MuxDisplInstance/Tetr(3) AND NOT MuxDisplInstance/Tetr(2)) OR (NOT MuxDisplInstance/Tetr(0) AND MuxDisplInstance/Tetr(3) AND MuxDisplInstance/Tetr(2)))); |
Seg_B <= NOT ((MuxDisplInstance/Tetr(0) AND
NOT MuxDisplInstance/Tetr(2)) XOR ((MuxDisplInstance/Tetr(1) AND NOT MuxDisplInstance/Tetr(0) AND MuxDisplInstance/Tetr(3)) OR (NOT MuxDisplInstance/Tetr(1) AND NOT MuxDisplInstance/Tetr(3) AND NOT MuxDisplInstance/Tetr(2)))); |
Seg_C <= NOT (((MuxDisplInstance/Tetr(1) AND
MuxDisplInstance/Tetr(3) AND NOT MuxDisplInstance/Tetr(2)) OR (MuxDisplInstance/Tetr(0) AND MuxDisplInstance/Tetr(3) AND NOT MuxDisplInstance/Tetr(2)) OR (MuxDisplInstance/Tetr(1) AND MuxDisplInstance/Tetr(0) AND NOT MuxDisplInstance/Tetr(3) AND MuxDisplInstance/Tetr(2)))); |
Seg_D <= NOT (((MuxDisplInstance/Tetr(1) AND
NOT MuxDisplInstance/Tetr(0) AND NOT MuxDisplInstance/Tetr(2)) OR (MuxDisplInstance/Tetr(1) AND MuxDisplInstance/Tetr(0) AND MuxDisplInstance/Tetr(3) AND MuxDisplInstance/Tetr(2)) OR (NOT MuxDisplInstance/Tetr(1) AND MuxDisplInstance/Tetr(0) AND NOT MuxDisplInstance/Tetr(3) AND NOT MuxDisplInstance/Tetr(2)) OR (NOT MuxDisplInstance/Tetr(1) AND NOT MuxDisplInstance/Tetr(0) AND NOT MuxDisplInstance/Tetr(3) AND MuxDisplInstance/Tetr(2)))); |
Seg_E <= NOT (((NOT MuxDisplInstance/Tetr(0) AND
NOT MuxDisplInstance/Tetr(3)) OR (NOT MuxDisplInstance/Tetr(1) AND NOT MuxDisplInstance/Tetr(0) AND MuxDisplInstance/Tetr(2)) OR (NOT MuxDisplInstance/Tetr(1) AND NOT MuxDisplInstance/Tetr(3) AND NOT MuxDisplInstance/Tetr(2)))); |
Seg_F <= NOT ((NOT MuxDisplInstance/Tetr(0) AND
NOT MuxDisplInstance/Tetr(3)) XOR ((NOT MuxDisplInstance/Tetr(1) AND NOT MuxDisplInstance/Tetr(0) AND NOT MuxDisplInstance/Tetr(2)) OR (MuxDisplInstance/Tetr(1) AND MuxDisplInstance/Tetr(0) AND NOT MuxDisplInstance/Tetr(3) AND MuxDisplInstance/Tetr(2)))); |
Seg_G <= NOT (((NOT MuxDisplInstance/Tetr(1) AND
NOT MuxDisplInstance/Tetr(3) AND MuxDisplInstance/Tetr(2)) OR (MuxDisplInstance/Tetr(1) AND NOT MuxDisplInstance/Tetr(0) AND NOT MuxDisplInstance/Tetr(3) AND NOT MuxDisplInstance/Tetr(2)) OR (NOT MuxDisplInstance/Tetr(1) AND MuxDisplInstance/Tetr(0) AND MuxDisplInstance/Tetr(3) AND NOT MuxDisplInstance/Tetr(2)))); |
Seg_K <= ((MuxDisplInstance/SelCnt(1) AND Context_FFd2 AND
Context_FFd1) OR (NOT MuxDisplInstance/SelCnt(1) AND Context_FFd2 AND NOT Context_FFd1) OR (NOT MuxDisplInstance/SelCnt(0) AND MuxDisplInstance/SelCnt(1) AND NOT Context_FFd2 AND NOT Context_FFd1 AND NOT F1Hz)); |
FDCPE_SetupKeyInstance/ShRegister0: FDCPE port map (SetupKeyInstance/ShRegister(0),SetupKeyInp,FDiv(4),'0',NOT Reset,'1'); |
FDCPE_SetupKeyInstance/ShRegister1: FDCPE port map (SetupKeyInstance/ShRegister(1),SetupKeyInstance/ShRegister(0),FDiv(4),'0',NOT Reset,'1'); |
FDCPE_SetupKeyInstance/ShRegister2: FDCPE port map (SetupKeyInstance/ShRegister(2),SetupKeyInstance/ShRegister(1),FDiv(4),'0',NOT Reset,'1'); |
FDCPE_SetupKeyInstance/ShRegister3: FDCPE port map (SetupKeyInstance/ShRegister(3),SetupKeyInstance/ShRegister(2),FDiv(4),'0',NOT Reset,'1'); |
LDCP_SetupKeyStatus: LDCP port map (SetupKeyStatus,NOT '0',,SetupKeyStatus_CLR,'0');
SetupKeyStatus_G <= (NOT SetupKeyInstance/ShRegister(0) AND NOT SetupKeyInstance/ShRegister(1) AND NOT SetupKeyInstance/ShRegister(2) AND NOT SetupKeyInstance/ShRegister(3)); SetupKeyStatus_CLR <= (SetupKeyInstance/ShRegister(0) AND SetupKeyInstance/ShRegister(1) AND SetupKeyInstance/ShRegister(2) AND SetupKeyInstance/ShRegister(3)); |
Register Legend:
FDCPE (Q,D,C,CLR,PRE,CE); FDDCPE (Q,D,C,CLR,PRE,CE); FTCPE (Q,D,C,CLR,PRE,CE); FTDCPE (Q,D,C,CLR,PRE,CE); LDCP (Q,D,G,CLR,PRE); |