Logic

Signal Name Total Pterms Total Inputs Function Block Macrocell Slew Rate Bank Pin Number Pin Type Pin Use Reg Use I/O Std I/O Style Reg Init State
DSel0 1 2 FB7 MC6 FAST 1 18 I/O O   LVCMOS18    
DSel1 1 2 FB7 MC5 FAST 1 19 I/O O   LVCMOS18    
DSel2 1 2 FB6 MC2 FAST 1 24 I/O/CDR O   LVCMOS18    
DSel3 1 2 FB6 MC4 FAST 1 27 I/O/GCK2 O   LVCMOS18    
FDiv<0> 1 1 FB1 MC7       (b) (b) TFF     RESET
FDiv<1> 2 2 FB1 MC8       (b) (b) TFF     RESET
FDiv<2> 2 3 FB1 MC9       (b) (b) TFF     RESET
FDiv<3> 2 4 FB1 MC10       (b) (b) TFF     RESET
FDiv<4> 2 5 FB1 MC11       (b) (b) TFF     RESET
FDiv<5> 2 6 FB1 MC15       (b) (b) TFF     RESET
FDiv<6> 2 7 FB1 MC16       (b) (b) TFF     RESET
Seg_A 0 0 FB4 MC1 FAST 2 8 I/O O   LVCMOS18    
Seg_B 4 8 FB4 MC2 FAST 2 9 I/O O   LVCMOS18    
Seg_C 4 8 FB2 MC15 FAST 2 7 I/O O   LVCMOS18    
Seg_D 4 8 FB2 MC14 FAST 2 6 I/O O   LVCMOS18    
Seg_E 0 0 FB2 MC12 FAST 2 4 I/O/GTS1 O   LVCMOS18    
Seg_F 0 0 FB2 MC5 FAST 2 3 I/O/GTS0 O   LVCMOS18    
Seg_G 4 8 FB2 MC3 FAST 2 2 I/O/GTS3 O   LVCMOS18    
Seg_K 0 0 FB2 MC1 FAST 2 1 I/O/GTS2 O   LVCMOS18    
SelCnt<0> 2 2 FB1 MC5       (b) (b) TFF     RESET
SelCnt<1> 3 3 FB1 MC4       (b) (b) TFF     RESET