Equations

********** Mapped Logic **********
FTCPE_AutomatState_FFd1: FTCPE port map (AutomatState_FFd1,AutomatState_FFd1_T,Clk,NOT Reset,'0','1');
     AutomatState_FFd1_T <= ((AutomatState_FFd2 AND NOT AutomatState_FFd1)
      OR (NOT AutomatState_FFd2 AND KeyLed AND NOT AutomatState_FFd3 AND
      AutomatState_FFd1));
FTCPE_AutomatState_FFd2: FTCPE port map (AutomatState_FFd2,AutomatState_FFd2_T,Clk,NOT Reset,'0','1');
     AutomatState_FFd2_T <= ((NOT AutomatState_FFd2 AND NOT KeyLed AND AutomatState_FFd3)
      OR (NOT AutomatState_FFd2 AND AutomatState_FFd3 AND
      AutomatState_FFd1)
      OR (AutomatState_FFd2 AND NOT KeyLed AND NOT AutomatState_FFd3 AND
      AutomatState_FFd1));
FTCPE_AutomatState_FFd3: FTCPE port map (AutomatState_FFd3,AutomatState_FFd3_T,Clk,NOT Reset,'0','1');
     AutomatState_FFd3_T <= ((NOT AutomatState_FFd3 AND NOT AutomatState_FFd1)
      OR (AutomatState_FFd2 AND KeyLed AND AutomatState_FFd3 AND
      AutomatState_FFd1)
      OR (NOT AutomatState_FFd2 AND KeyLed AND NOT AutomatState_FFd3 AND
      AutomatState_FFd1));
FDCPE_Clear: FDCPE port map (Clear,Clear_D,Clk,'0','0','1');
     Clear_D <= NOT (((NOT Reset AND NOT Clear)
      OR (AutomatState_FFd2 AND AutomatState_FFd3 AND
      NOT AutomatState_FFd1 AND Reset)
      OR (NOT AutomatState_FFd2 AND NOT AutomatState_FFd3 AND
      NOT AutomatState_FFd1 AND Reset)));
FTCPE_Cnt10000: FTCPE port map (Cnt1000(0),Cnt1000_T(0),TimeDiv(13),NOT N_PZ_549,'0','1');
     Cnt1000_T(0) <= (NOT Cnt100(1) AND NOT RunStatusLed AND Cnt100(0) AND Cnt10(0) AND
      Cnt1(0) AND NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3) AND NOT Cnt10(1) AND
      NOT Cnt10(2) AND Cnt10(3) AND NOT Cnt100(2) AND Cnt100(3));
FTCPE_Cnt10001: FTCPE port map (Cnt1000(1),Cnt1000_T(1),TimeDiv(13),NOT N_PZ_549,'0','1');
     Cnt1000_T(1) <= ((NOT Cnt100(1) AND NOT RunStatusLed AND Cnt100(0) AND Cnt10(0) AND
      Cnt1(0) AND NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3) AND NOT Cnt10(1) AND
      NOT Cnt10(2) AND Cnt10(3) AND NOT Cnt100(2) AND Cnt100(3) AND Cnt1000(1) AND
      Cnt1000(0))
      OR (NOT Cnt100(1) AND NOT RunStatusLed AND Cnt100(0) AND Cnt10(0) AND
      Cnt1(0) AND NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3) AND NOT Cnt10(1) AND
      NOT Cnt10(2) AND Cnt10(3) AND NOT Cnt100(2) AND Cnt100(3) AND Cnt1000(0) AND
      Cnt1000(2))
      OR (NOT Cnt100(1) AND NOT RunStatusLed AND Cnt100(0) AND Cnt10(0) AND
      Cnt1(0) AND NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3) AND NOT Cnt10(1) AND
      NOT Cnt10(2) AND Cnt10(3) AND NOT Cnt100(2) AND Cnt100(3) AND Cnt1000(0) AND
      NOT Cnt1000(3)));
FTCPE_Cnt10002: FTCPE port map (Cnt1000(2),Cnt1000_T(2),TimeDiv(13),NOT N_PZ_549,'0','1');
     Cnt1000_T(2) <= (NOT Cnt100(1) AND NOT RunStatusLed AND Cnt100(0) AND Cnt10(0) AND
      Cnt1(0) AND NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3) AND NOT Cnt10(1) AND
      NOT Cnt10(2) AND Cnt10(3) AND NOT Cnt100(2) AND Cnt100(3) AND Cnt1000(1) AND
      Cnt1000(0));
FTCPE_Cnt10003: FTCPE port map (Cnt1000(3),Cnt1000_T(3),TimeDiv(13),NOT N_PZ_549,'0','1');
     Cnt1000_T(3) <= ((NOT Cnt100(1) AND NOT RunStatusLed AND Cnt100(0) AND Cnt10(0) AND
      Cnt1(0) AND NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3) AND NOT Cnt10(1) AND
      NOT Cnt10(2) AND Cnt10(3) AND NOT Cnt100(2) AND Cnt100(3) AND Cnt1000(1) AND
      Cnt1000(0) AND Cnt1000(2))
      OR (NOT Cnt100(1) AND NOT RunStatusLed AND Cnt100(0) AND Cnt10(0) AND
      Cnt1(0) AND NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3) AND NOT Cnt10(1) AND
      NOT Cnt10(2) AND Cnt10(3) AND NOT Cnt100(2) AND Cnt100(3) AND NOT Cnt1000(1) AND
      Cnt1000(0) AND NOT Cnt1000(2) AND Cnt1000(3)));
FTCPE_Cnt1000: FTCPE port map (Cnt100(0),Cnt100_T(0),TimeDiv(13),NOT N_PZ_549,'0','1');
     Cnt100_T(0) <= (NOT RunStatusLed AND Cnt10(0) AND Cnt1(0) AND NOT Cnt1(1) AND
      NOT Cnt1(2) AND Cnt1(3) AND NOT Cnt10(1) AND NOT Cnt10(2) AND Cnt10(3));
FTCPE_Cnt1001: FTCPE port map (Cnt100(1),Cnt100_T(1),TimeDiv(13),NOT N_PZ_549,'0','1');
     Cnt100_T(1) <= ((Cnt100(1) AND NOT RunStatusLed AND Cnt100(0) AND Cnt10(0) AND
      Cnt1(0) AND NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3) AND NOT Cnt10(1) AND
      NOT Cnt10(2) AND Cnt10(3))
      OR (NOT RunStatusLed AND Cnt100(0) AND Cnt10(0) AND Cnt1(0) AND
      NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3) AND NOT Cnt10(1) AND NOT Cnt10(2) AND
      Cnt10(3) AND Cnt100(2))
      OR (NOT RunStatusLed AND Cnt100(0) AND Cnt10(0) AND Cnt1(0) AND
      NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3) AND NOT Cnt10(1) AND NOT Cnt10(2) AND
      Cnt10(3) AND NOT Cnt100(3)));
FTCPE_Cnt1002: FTCPE port map (Cnt100(2),Cnt100_T(2),TimeDiv(13),NOT N_PZ_549,'0','1');
     Cnt100_T(2) <= (Cnt100(1) AND NOT RunStatusLed AND Cnt100(0) AND Cnt10(0) AND
      Cnt1(0) AND NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3) AND NOT Cnt10(1) AND
      NOT Cnt10(2) AND Cnt10(3));
FTCPE_Cnt1003: FTCPE port map (Cnt100(3),Cnt100_T(3),TimeDiv(13),NOT N_PZ_549,'0','1');
     Cnt100_T(3) <= ((Cnt100(1) AND NOT RunStatusLed AND Cnt100(0) AND Cnt10(0) AND
      Cnt1(0) AND NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3) AND NOT Cnt10(1) AND
      NOT Cnt10(2) AND Cnt10(3) AND Cnt100(2))
      OR (NOT Cnt100(1) AND NOT RunStatusLed AND Cnt100(0) AND Cnt10(0) AND
      Cnt1(0) AND NOT Cnt1(1) AND NOT Cnt1(2) AND Cnt1(3) AND NOT Cnt10(1) AND
      NOT Cnt10(2) AND Cnt10(3) AND NOT Cnt100(2) AND Cnt100(3)));
FTCPE_Cnt100: FTCPE port map (Cnt10(0),Cnt10_T(0),TimeDiv(13),NOT N_PZ_549,'0','1');
     Cnt10_T(0) <= (NOT RunStatusLed AND Cnt1(0) AND NOT Cnt1(1) AND NOT Cnt1(2) AND
      Cnt1(3));
FTCPE_Cnt101: FTCPE port map (Cnt10(1),Cnt10_T(1),TimeDiv(13),NOT N_PZ_549,'0','1');
     Cnt10_T(1) <= ((NOT RunStatusLed AND Cnt10(0) AND Cnt1(0) AND NOT Cnt1(1) AND
      NOT Cnt1(2) AND Cnt1(3) AND Cnt10(1))
      OR (NOT RunStatusLed AND Cnt10(0) AND Cnt1(0) AND NOT Cnt1(1) AND
      NOT Cnt1(2) AND Cnt1(3) AND Cnt10(2))
      OR (NOT RunStatusLed AND Cnt10(0) AND Cnt1(0) AND NOT Cnt1(1) AND
      NOT Cnt1(2) AND Cnt1(3) AND NOT Cnt10(3)));
FTCPE_Cnt102: FTCPE port map (Cnt10(2),Cnt10_T(2),TimeDiv(13),NOT N_PZ_549,'0','1');
     Cnt10_T(2) <= (NOT RunStatusLed AND Cnt10(0) AND Cnt1(0) AND NOT Cnt1(1) AND
      NOT Cnt1(2) AND Cnt1(3) AND Cnt10(1));
FTCPE_Cnt103: FTCPE port map (Cnt10(3),Cnt10_T(3),TimeDiv(13),NOT N_PZ_549,'0','1');
     Cnt10_T(3) <= ((NOT RunStatusLed AND Cnt10(0) AND Cnt1(0) AND NOT Cnt1(1) AND
      NOT Cnt1(2) AND Cnt1(3) AND Cnt10(1) AND Cnt10(2))
      OR (NOT RunStatusLed AND Cnt10(0) AND Cnt1(0) AND NOT Cnt1(1) AND
      NOT Cnt1(2) AND Cnt1(3) AND NOT Cnt10(1) AND NOT Cnt10(2) AND Cnt10(3)));
FTCPE_Cnt10: FTCPE port map (Cnt1(0),NOT RunStatusLed,TimeDiv(13),NOT N_PZ_549,'0','1');
FTCPE_Cnt11: FTCPE port map (Cnt1(1),Cnt1_T(1),TimeDiv(13),NOT N_PZ_549,'0','1');
     Cnt1_T(1) <= (NOT RunStatusLed AND Cnt1(0))
      XOR (NOT RunStatusLed AND Cnt1(0) AND NOT Cnt1(1) AND NOT Cnt1(2) AND
      Cnt1(3));
FTCPE_Cnt12: FTCPE port map (Cnt1(2),Cnt1_T(2),TimeDiv(13),NOT N_PZ_549,'0','1');
     Cnt1_T(2) <= (NOT RunStatusLed AND Cnt1(0) AND Cnt1(1));
FTCPE_Cnt13: FTCPE port map (Cnt1(3),Cnt1_T(3),TimeDiv(13),NOT N_PZ_549,'0','1');
     Cnt1_T(3) <= ((NOT RunStatusLed AND Cnt1(0) AND Cnt1(1) AND Cnt1(2))
      OR (NOT RunStatusLed AND Cnt1(0) AND NOT Cnt1(1) AND NOT Cnt1(2) AND
      Cnt1(3)));
DSel0 <= NOT ((NOT MuxDisplInstance/SelCnt(0) AND
      NOT MuxDisplInstance/SelCnt(1)));
DSel1 <= NOT ((MuxDisplInstance/SelCnt(0) AND
      NOT MuxDisplInstance/SelCnt(1)));
DSel2 <= NOT ((NOT MuxDisplInstance/SelCnt(0) AND
      MuxDisplInstance/SelCnt(1)));
DSel3 <= NOT ((MuxDisplInstance/SelCnt(0) AND
      MuxDisplInstance/SelCnt(1)));
FTCPE_FClk: FTCPE port map (FClk,FClk_T,NOT Clk,NOT Reset,'0','1');
     FClk_T <= (FDivInstance/FDivCnt(0) AND FDivInstance/FDivCnt(1) AND
      FDivInstance/FDivCnt(2) AND FDivInstance/FDivCnt(3) AND FDivInstance/FDivCnt(4) AND
      FDivInstance/FDivCnt(5) AND FDivInstance/FDivCnt(6));
FTCPE_FDiv0: FTCPE port map (FDiv(0),'0',FClk,NOT Reset,'0','1');
FTCPE_FDiv1: FTCPE port map (FDiv(1),FDiv(0),FClk,NOT Reset,'0','1');
FTCPE_FDiv2: FTCPE port map (FDiv(2),FDiv_T(2),FClk,NOT Reset,'0','1');
     FDiv_T(2) <= (FDiv(0) AND FDiv(1));
FTCPE_FDiv3: FTCPE port map (FDiv(3),FDiv_T(3),FClk,NOT Reset,'0','1');
     FDiv_T(3) <= (FDiv(0) AND FDiv(2) AND FDiv(1));
FTCPE_FDivInstance/FDivCnt0: FTCPE port map (FDivInstance/FDivCnt(0),'0',NOT Clk,NOT Reset,'0','1');
FTCPE_FDivInstance/FDivCnt1: FTCPE port map (FDivInstance/FDivCnt(1),FDivInstance/FDivCnt(0),NOT Clk,NOT Reset,'0','1');
FTCPE_FDivInstance/FDivCnt2: FTCPE port map (FDivInstance/FDivCnt(2),FDivInstance/FDivCnt_T(2),NOT Clk,NOT Reset,'0','1');
     FDivInstance/FDivCnt_T(2) <= (FDivInstance/FDivCnt(0) AND FDivInstance/FDivCnt(1));
FTCPE_FDivInstance/FDivCnt3: FTCPE port map (FDivInstance/FDivCnt(3),FDivInstance/FDivCnt_T(3),NOT Clk,NOT Reset,'0','1');
     FDivInstance/FDivCnt_T(3) <= (FDivInstance/FDivCnt(0) AND FDivInstance/FDivCnt(1) AND
      FDivInstance/FDivCnt(2));
FTCPE_FDivInstance/FDivCnt4: FTCPE port map (FDivInstance/FDivCnt(4),FDivInstance/FDivCnt_T(4),NOT Clk,NOT Reset,'0','1');
     FDivInstance/FDivCnt_T(4) <= (FDivInstance/FDivCnt(0) AND FDivInstance/FDivCnt(1) AND
      FDivInstance/FDivCnt(2) AND FDivInstance/FDivCnt(3));
FTCPE_FDivInstance/FDivCnt5: FTCPE port map (FDivInstance/FDivCnt(5),FDivInstance/FDivCnt_T(5),NOT Clk,NOT Reset,'0','1');
     FDivInstance/FDivCnt_T(5) <= (FDivInstance/FDivCnt(0) AND FDivInstance/FDivCnt(1) AND
      FDivInstance/FDivCnt(2) AND FDivInstance/FDivCnt(3) AND FDivInstance/FDivCnt(4));
FTCPE_FDivInstance/FDivCnt6: FTCPE port map (FDivInstance/FDivCnt(6),FDivInstance/FDivCnt_T(6),NOT Clk,NOT Reset,'0','1');
     FDivInstance/FDivCnt_T(6) <= (FDivInstance/FDivCnt(0) AND FDivInstance/FDivCnt(1) AND
      FDivInstance/FDivCnt(2) AND FDivInstance/FDivCnt(3) AND FDivInstance/FDivCnt(4) AND
      FDivInstance/FDivCnt(5));
FDCPE_Key0Instance/ShRegister0: FDCPE port map (Key0Instance/ShRegister(0),PushKeyIn,FDiv(2),'0',NOT Reset,'1');
FDCPE_Key0Instance/ShRegister1: FDCPE port map (Key0Instance/ShRegister(1),Key0Instance/ShRegister(0),FDiv(2),'0',NOT Reset,'1');
FDCPE_Key0Instance/ShRegister2: FDCPE port map (Key0Instance/ShRegister(2),Key0Instance/ShRegister(1),FDiv(2),'0',NOT Reset,'1');
FDCPE_Key0Instance/ShRegister3: FDCPE port map (Key0Instance/ShRegister(3),Key0Instance/ShRegister(2),FDiv(2),'0',NOT Reset,'1');
LDCP_KeyLed: LDCP port map (KeyLed,'0',,'0',KeyLed_PRE);
     KeyLed_G <= (NOT Key0Instance/ShRegister(0) AND
      NOT Key0Instance/ShRegister(1) AND NOT Key0Instance/ShRegister(2) AND
      NOT Key0Instance/ShRegister(3));
     KeyLed_PRE <= (Key0Instance/ShRegister(0) AND
      Key0Instance/ShRegister(1) AND Key0Instance/ShRegister(2) AND
      Key0Instance/ShRegister(3));
FTCPE_MuxDisplInstance/SelCnt0: FTCPE port map (MuxDisplInstance/SelCnt(0),'0',FDiv(3),NOT Reset,'0','1');
FTCPE_MuxDisplInstance/SelCnt1: FTCPE port map (MuxDisplInstance/SelCnt(1),MuxDisplInstance/SelCnt(0),FDiv(3),NOT Reset,'0','1');
MuxDisplInstance/Tetr(0) <= ((Cnt100(0) AND NOT Seg_K)
      OR (Cnt10(0) AND NOT DSel1)
      OR (Cnt1(0) AND NOT DSel0)
      OR (Cnt1000(0) AND NOT DSel3));
MuxDisplInstance/Tetr(1) <= ((Cnt100(1) AND NOT Seg_K)
      OR (Cnt1(1) AND NOT DSel0)
      OR (Cnt10(1) AND NOT DSel1)
      OR (Cnt1000(1) AND NOT DSel3));
MuxDisplInstance/Tetr(2) <= ((Cnt1(2) AND NOT DSel0)
      OR (Cnt10(2) AND NOT DSel1)
      OR (Cnt100(2) AND NOT Seg_K)
      OR (Cnt1000(2) AND NOT DSel3));
MuxDisplInstance/Tetr(3) <= ((Cnt1(3) AND NOT DSel0)
      OR (Cnt10(3) AND NOT DSel1)
      OR (Cnt100(3) AND NOT Seg_K)
      OR (Cnt1000(3) AND NOT DSel3));
N_PZ_341 <= (NOT RunStatusLed AND TimeDiv(0) AND TimeDiv(1) AND
      TimeDiv(2) AND TimeDiv(3) AND TimeDiv(4) AND TimeDiv(5) AND
      TimeDiv(6) AND TimeDiv(7));
N_PZ_549 <= (Reset AND Clear);
FDCPE_RunStatusLed: FDCPE port map (RunStatusLed,NOT AutomatState_FFd2,Clk,'0','0',Reset);
Seg_A <= (NOT MuxDisplInstance/Tetr(1) AND
      MuxDisplInstance/Tetr(0))
      XOR ((NOT MuxDisplInstance/Tetr(1) AND
      NOT MuxDisplInstance/Tetr(3) AND MuxDisplInstance/Tetr(2))
      OR (MuxDisplInstance/Tetr(0) AND
      MuxDisplInstance/Tetr(3) AND NOT MuxDisplInstance/Tetr(2)));
Seg_B <= (NOT MuxDisplInstance/Tetr(0) AND
      MuxDisplInstance/Tetr(2))
      XOR ((MuxDisplInstance/Tetr(1) AND
      MuxDisplInstance/Tetr(0) AND MuxDisplInstance/Tetr(3))
      OR (NOT MuxDisplInstance/Tetr(1) AND
      NOT MuxDisplInstance/Tetr(3) AND MuxDisplInstance/Tetr(2)));
Seg_C <= ((MuxDisplInstance/Tetr(1) AND
      MuxDisplInstance/Tetr(3) AND MuxDisplInstance/Tetr(2))
      OR (NOT MuxDisplInstance/Tetr(0) AND
      MuxDisplInstance/Tetr(3) AND MuxDisplInstance/Tetr(2))
      OR (MuxDisplInstance/Tetr(1) AND
      NOT MuxDisplInstance/Tetr(0) AND NOT MuxDisplInstance/Tetr(3) AND
      NOT MuxDisplInstance/Tetr(2)));
Seg_D <= ((MuxDisplInstance/Tetr(1) AND
      MuxDisplInstance/Tetr(0) AND MuxDisplInstance/Tetr(2))
      OR (MuxDisplInstance/Tetr(1) AND
      NOT MuxDisplInstance/Tetr(0) AND MuxDisplInstance/Tetr(3) AND
      NOT MuxDisplInstance/Tetr(2))
      OR (NOT MuxDisplInstance/Tetr(1) AND
      MuxDisplInstance/Tetr(0) AND NOT MuxDisplInstance/Tetr(3) AND
      NOT MuxDisplInstance/Tetr(2))
      OR (NOT MuxDisplInstance/Tetr(1) AND
      NOT MuxDisplInstance/Tetr(0) AND NOT MuxDisplInstance/Tetr(3) AND
      MuxDisplInstance/Tetr(2)));
Seg_E <= ((MuxDisplInstance/Tetr(0) AND
      NOT MuxDisplInstance/Tetr(3))
      OR (NOT MuxDisplInstance/Tetr(1) AND
      MuxDisplInstance/Tetr(0) AND NOT MuxDisplInstance/Tetr(2))
      OR (NOT MuxDisplInstance/Tetr(1) AND
      NOT MuxDisplInstance/Tetr(3) AND MuxDisplInstance/Tetr(2)));
Seg_F <= (MuxDisplInstance/Tetr(0) AND
      NOT MuxDisplInstance/Tetr(3))
      XOR ((NOT MuxDisplInstance/Tetr(1) AND
      MuxDisplInstance/Tetr(0) AND MuxDisplInstance/Tetr(2))
      OR (MuxDisplInstance/Tetr(1) AND
      NOT MuxDisplInstance/Tetr(0) AND NOT MuxDisplInstance/Tetr(3) AND
      NOT MuxDisplInstance/Tetr(2)));
Seg_G <= ((NOT MuxDisplInstance/Tetr(1) AND
      NOT MuxDisplInstance/Tetr(3) AND NOT MuxDisplInstance/Tetr(2))
      OR (MuxDisplInstance/Tetr(1) AND
      MuxDisplInstance/Tetr(0) AND NOT MuxDisplInstance/Tetr(3) AND
      MuxDisplInstance/Tetr(2))
      OR (NOT MuxDisplInstance/Tetr(1) AND
      NOT MuxDisplInstance/Tetr(0) AND MuxDisplInstance/Tetr(3) AND
      MuxDisplInstance/Tetr(2)));
Seg_K <= NOT ((NOT MuxDisplInstance/SelCnt(0) AND
      MuxDisplInstance/SelCnt(1)));
FTCPE_TimeDiv0: FTCPE port map (TimeDiv(0),NOT RunStatusLed,Clk,NOT N_PZ_549,'0','1');
FTCPE_TimeDiv1: FTCPE port map (TimeDiv(1),TimeDiv_T(1),Clk,NOT N_PZ_549,'0','1');
     TimeDiv_T(1) <= (NOT RunStatusLed AND TimeDiv(0));
FTCPE_TimeDiv2: FTCPE port map (TimeDiv(2),TimeDiv_T(2),Clk,NOT N_PZ_549,'0','1');
     TimeDiv_T(2) <= (NOT RunStatusLed AND TimeDiv(0) AND TimeDiv(1));
FTCPE_TimeDiv3: FTCPE port map (TimeDiv(3),TimeDiv_T(3),Clk,NOT N_PZ_549,'0','1');
     TimeDiv_T(3) <= (NOT RunStatusLed AND TimeDiv(0) AND TimeDiv(1) AND
      TimeDiv(2));
FTCPE_TimeDiv4: FTCPE port map (TimeDiv(4),TimeDiv_T(4),Clk,NOT N_PZ_549,'0','1');
     TimeDiv_T(4) <= NOT (((RunStatusLed)
      OR (NOT TimeDiv(0))
      OR (NOT TimeDiv(1))
      OR (NOT TimeDiv(2))
      OR (NOT TimeDiv(3))
      OR (TimeDiv(13) AND TimeDiv(10) AND TimeDiv(8) AND
      NOT TimeDiv(11) AND TimeDiv(9) AND NOT TimeDiv(12) AND NOT TimeDiv(4) AND
      NOT TimeDiv(5) AND NOT TimeDiv(6) AND NOT TimeDiv(7))));
FTCPE_TimeDiv5: FTCPE port map (TimeDiv(5),TimeDiv_T(5),Clk,NOT N_PZ_549,'0','1');
     TimeDiv_T(5) <= (NOT RunStatusLed AND TimeDiv(0) AND TimeDiv(1) AND
      TimeDiv(2) AND TimeDiv(3) AND TimeDiv(4));
FTCPE_TimeDiv6: FTCPE port map (TimeDiv(6),TimeDiv_T(6),Clk,NOT N_PZ_549,'0','1');
     TimeDiv_T(6) <= (NOT RunStatusLed AND TimeDiv(0) AND TimeDiv(1) AND
      TimeDiv(2) AND TimeDiv(3) AND TimeDiv(4) AND TimeDiv(5));
FTCPE_TimeDiv7: FTCPE port map (TimeDiv(7),TimeDiv_T(7),Clk,NOT N_PZ_549,'0','1');
     TimeDiv_T(7) <= (NOT RunStatusLed AND TimeDiv(0) AND TimeDiv(1) AND
      TimeDiv(2) AND TimeDiv(3) AND TimeDiv(4) AND TimeDiv(5) AND
      TimeDiv(6));
FDCPE_TimeDiv8: FDCPE port map (TimeDiv(8),TimeDiv_D(8),Clk,NOT N_PZ_549,'0','1');
     TimeDiv_D(8) <= NOT (((TimeDiv(8) AND N_PZ_341)
      OR (NOT TimeDiv(8) AND NOT N_PZ_341)
      OR (NOT RunStatusLed AND TimeDiv(13) AND TimeDiv(0) AND
      TimeDiv(10) AND NOT TimeDiv(11) AND TimeDiv(9) AND NOT TimeDiv(12) AND
      TimeDiv(1) AND TimeDiv(2) AND TimeDiv(3) AND NOT TimeDiv(4) AND
      NOT TimeDiv(5) AND NOT TimeDiv(6) AND NOT TimeDiv(7))));
FDCPE_TimeDiv9: FDCPE port map (TimeDiv(9),TimeDiv_D(9),Clk,NOT N_PZ_549,'0','1');
     TimeDiv_D(9) <= NOT (((NOT TimeDiv(8) AND NOT TimeDiv(9))
      OR (NOT TimeDiv(9) AND NOT N_PZ_341)
      OR (TimeDiv(8) AND TimeDiv(9) AND N_PZ_341)
      OR (NOT RunStatusLed AND TimeDiv(13) AND TimeDiv(0) AND
      TimeDiv(10) AND TimeDiv(8) AND NOT TimeDiv(11) AND NOT TimeDiv(12) AND
      TimeDiv(1) AND TimeDiv(2) AND TimeDiv(3) AND NOT TimeDiv(4) AND
      NOT TimeDiv(5) AND NOT TimeDiv(6) AND NOT TimeDiv(7))));
FDCPE_TimeDiv10: FDCPE port map (TimeDiv(10),TimeDiv_D(10),Clk,NOT N_PZ_549,'0','1');
     TimeDiv_D(10) <= NOT (((NOT TimeDiv(10) AND NOT TimeDiv(8))
      OR (NOT TimeDiv(10) AND NOT TimeDiv(9))
      OR (NOT TimeDiv(10) AND NOT N_PZ_341)
      OR (TimeDiv(10) AND TimeDiv(8) AND TimeDiv(9) AND
      N_PZ_341)
      OR (NOT RunStatusLed AND TimeDiv(13) AND TimeDiv(0) AND
      TimeDiv(8) AND NOT TimeDiv(11) AND TimeDiv(9) AND NOT TimeDiv(12) AND
      TimeDiv(1) AND TimeDiv(2) AND TimeDiv(3) AND NOT TimeDiv(4) AND
      NOT TimeDiv(5) AND NOT TimeDiv(6) AND NOT TimeDiv(7))));
FTCPE_TimeDiv11: FTCPE port map (TimeDiv(11),TimeDiv_T(11),Clk,NOT N_PZ_549,'0','1');
     TimeDiv_T(11) <= (TimeDiv(10) AND TimeDiv(8) AND TimeDiv(9) AND
      N_PZ_341);
FTCPE_TimeDiv12: FTCPE port map (TimeDiv(12),TimeDiv_T(12),Clk,NOT N_PZ_549,'0','1');
     TimeDiv_T(12) <= (TimeDiv(10) AND TimeDiv(8) AND TimeDiv(11) AND
      TimeDiv(9) AND N_PZ_341);
FTCPE_TimeDiv13: FTCPE port map (TimeDiv(13),TimeDiv_T(13),Clk,NOT N_PZ_549,'0','1');
     TimeDiv_T(13) <= ((TimeDiv(10) AND TimeDiv(8) AND TimeDiv(11) AND
      TimeDiv(9) AND TimeDiv(12) AND N_PZ_341)
      OR (NOT RunStatusLed AND TimeDiv(13) AND TimeDiv(0) AND
      TimeDiv(10) AND TimeDiv(8) AND NOT TimeDiv(11) AND TimeDiv(9) AND
      NOT TimeDiv(12) AND TimeDiv(1) AND TimeDiv(2) AND TimeDiv(3) AND
      NOT TimeDiv(4) AND NOT TimeDiv(5) AND NOT TimeDiv(6) AND NOT TimeDiv(7)));
Register Legend:
      FDCPE (Q,D,C,CLR,PRE,CE);
      FDDCPE (Q,D,C,CLR,PRE,CE);
      FTCPE (Q,D,C,CLR,PRE,CE);
      FTDCPE (Q,D,C,CLR,PRE,CE);
      LDCP (Q,D,G,CLR,PRE);