Signal Name | Total Pterms | Total Inputs | Function Block | Macrocell | Slew Rate | Bank | Pin Number | Pin Type | Pin Use | Reg Use | I/O Std | I/O Style | Reg Init State |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MuxDisplInstance/Tetr<0> | 4 | 8 | FB2 | MC1 | 2 | 2 | I/O/GTS2 | (b) | |||||
Cnt1<2> | 3 | 5 | FB2 | MC3 | 2 | 3 | I/O/GTS3 | (b) | TFF | RESET | |||
Cnt1<3> | 4 | 7 | FB2 | MC4 | 2 | 4 | I/O | (b) | TFF | RESET | |||
Cnt10<0> | 3 | 7 | FB2 | MC5 | 2 | 5 | I/O/GTS0 | (b) | TFF | RESET | |||
Cnt1<1> | 4 | 7 | FB2 | MC12 | 2 | 6 | I/O/GTS1 | (b) | TFF | RESET | |||
Cnt10<2> | 3 | 9 | FB2 | MC13 | 2 | 7 | I/O | (b) | TFF | RESET | |||
Cnt10<1> | 5 | 11 | FB2 | MC14 | 2 | 9 | I/O | (b) | TFF | RESET | |||
Cnt10<3> | 4 | 11 | FB2 | MC15 | 2 | 10 | I/O | (b) | TFF | RESET | |||
Seg_B | 3 | 4 | FB16 | MC16 | FAST | 1 | 53 | I/O | O | LVCMOS18 | |||
Seg_F | 3 | 4 | FB16 | MC15 | FAST | 1 | 54 | I/O | O | LVCMOS18 | |||
Seg_A | 3 | 4 | FB16 | MC13 | FAST | 1 | 56 | I/O | O | LVCMOS18 | |||
Seg_E | 3 | 4 | FB16 | MC12 | FAST | 1 | 57 | I/O | O | LVCMOS18 | |||
Seg_D | 4 | 4 | FB16 | MC11 | FAST | 1 | 58 | I/O | O | LVCMOS18 | |||
Seg_K | 1 | 2 | FB16 | MC6 | FAST | 1 | 59 | I/O | O | LVCMOS18 | |||
Seg_C | 3 | 4 | FB16 | MC5 | FAST | 1 | 60 | I/O | O | LVCMOS18 | |||
Seg_G | 3 | 4 | FB14 | MC16 | FAST | 1 | 61 | I/O | O | LVCMOS18 | |||
MeasLed | 2 | 4 | FB14 | MC13 | FAST | 1 | 66 | I/O | O | DFF/S | LVCMOS18 | SET | |
SignalEcho | 1 | 1 | FB14 | MC6 | FAST | 1 | 68 | I/O | O | LVCMOS18 | |||
RunStatusLed | 3 | 5 | FB14 | MC4 | FAST | 1 | 69 | I/O | O | TFF | LVCMOS18 | RESET | |
Key0Instance/ShRegister<0> | 1 | 1 | FB12 | MC15 | 2 | 94 | I/O | IR | DFF | KPR | |||
DSel0 | 1 | 2 | FB11 | MC13 | FAST | 2 | 126 | I/O | O | LVCMOS18 | |||
DSel1 | 1 | 2 | FB11 | MC14 | FAST | 2 | 128 | I/O | O | LVCMOS18 | |||
DSel2 | 1 | 2 | FB11 | MC15 | FAST | 2 | 129 | I/O | O | LVCMOS18 | |||
DSel3 | 1 | 2 | FB11 | MC16 | FAST | 2 | 130 | I/O | O | LVCMOS18 | |||
Cnt1<0> | 3 | 3 | FB3 | MC16 | 2 | 131 | I/O | (b) | TFF | RESET | |||
AutomatState_FFd2 | 4 | 5 | FB3 | MC14 | 2 | 132 | I/O | (b) | DFF | RESET | |||
Clear | 2 | 4 | FB3 | MC5 | 2 | 133 | I/O | (b) | DFF | RESET | |||
N_PZ_533 | 1 | 2 | FB3 | MC3 | 2 | 134 | I/O | (b) | |||||
Key0Instance/ShRegister<1> | 2 | 2 | FB3 | MC2 | 2 | 135 | I/O | (b) | DFF | RESET | |||
Key0Instance/ShRegister<2> | 2 | 2 | FB3 | MC1 | 2 | 136 | I/O | (b) | DFF | RESET | |||
FDiv<10> | 1 | 10 | FB1 | MC14 | 2 | 137 | I/O | (b) | TFF | RESET | |||
FDiv<11> | 1 | 11 | FB1 | MC13 | 2 | 138 | I/O | (b) | TFF | RESET | |||
MuxDisplInstance/SelCnt<0> | 1 | 1 | FB1 | MC12 | 2 | 139 | I/O | (b) | TFF | RESET | |||
MuxDisplInstance/SelCnt<1> | 2 | 2 | FB1 | MC6 | 2 | 140 | I/O | (b) | TFF | RESET | |||
AutomatState_FFd1 | 2 | 4 | FB1 | MC4 | 2 | 142 | I/O | (b) | TFF | RESET | |||
AutomatState_FFd3 | 3 | 5 | FB1 | MC3 | 2 | 143 | I/O/GSR | GSR/I | DFF | KPR | RESET | ||
FDiv<9> | 1 | 9 | FB1 | MC1 | (b) | (b) | RESET | ||||||
FDiv<8> | 1 | 8 | FB1 | MC2 | (b) | (b) | RESET | ||||||
FDiv<7> | 1 | 7 | FB1 | MC5 | (b) | (b) | RESET | ||||||
FDiv<6> | 1 | 6 | FB1 | MC7 | (b) | (b) | RESET | ||||||
FDiv<5> | 1 | 5 | FB1 | MC8 | (b) | (b) | RESET | ||||||
FDiv<4> | 1 | 4 | FB1 | MC9 | (b) | (b) | RESET | ||||||
FDiv<3> | 1 | 3 | FB1 | MC10 | (b) | (b) | RESET | ||||||
FDiv<2> | 1 | 2 | FB1 | MC11 | (b) | (b) | RESET | ||||||
FDiv<1> | 1 | 1 | FB1 | MC15 | (b) | (b) | RESET | ||||||
FDiv<0> | 0 | 0 | FB1 | MC16 | (b) | (b) | RESET | ||||||
Cnt100<0> | 3 | 11 | FB2 | MC2 | (b) | (b) | RESET | ||||||
Cnt100<2> | 3 | 13 | FB2 | MC6 | (b) | (b) | RESET | ||||||
Cnt100<1> | 5 | 15 | FB2 | MC7 | (b) | (b) | RESET | ||||||
Cnt100<3> | 4 | 15 | FB2 | MC8 | (b) | (b) | RESET | ||||||
Cnt1000<0> | 3 | 15 | FB2 | MC9 | (b) | (b) | RESET | ||||||
Cnt1000<2> | 3 | 17 | FB2 | MC10 | (b) | (b) | RESET | ||||||
Cnt1000<3> | 4 | 19 | FB2 | MC11 | (b) | (b) | RESET | ||||||
Cnt1000<1> | 5 | 19 | FB2 | MC16 | (b) | (b) | RESET | ||||||
TimeDiv<0> | 2 | 2 | FB3 | MC4 | (b) | (b) | RESET | ||||||
TimeDiv<1> | 2 | 3 | FB3 | MC6 | (b) | (b) | RESET | ||||||
TimeDiv<2> | 2 | 4 | FB3 | MC7 | (b) | (b) | RESET | ||||||
TimeDiv<4> | 2 | 6 | FB3 | MC8 | (b) | (b) | RESET | ||||||
TimeDiv<9> | 3 | 12 | FB3 | MC9 | (b) | (b) | RESET | ||||||
TimeDiv<8> | 3 | 12 | FB3 | MC10 | (b) | (b) | RESET | ||||||
TimeDiv<7> | 3 | 12 | FB3 | MC11 | (b) | (b) | RESET | ||||||
TimeDiv<6> | 3 | 12 | FB3 | MC12 | (b) | (b) | RESET | ||||||
TimeDiv<5> | 3 | 12 | FB3 | MC13 | (b) | (b) | RESET | ||||||
TimeDiv<3> | 6 | 12 | FB3 | MC15 | (b) | (b) | RESET | ||||||
GoKeyStatus | 2 | 4 | FB4 | MC10 | (b) | (b) | RESET | ||||||
Key0Instance/ShRegister<3> | 2 | 2 | FB4 | MC11 | (b) | (b) | RESET | ||||||
MuxDisplInstance/Tetr<3> | 4 | 8 | FB4 | MC13 | (b) | (b) | |||||||
MuxDisplInstance/Tetr<2> | 4 | 8 | FB4 | MC15 | (b) | (b) | |||||||
MuxDisplInstance/Tetr<1> | 4 | 8 | FB4 | MC16 | (b) | (b) |