Logic

Signal Name Total Pterms Total Inputs Function Block Macrocell Slew Rate Bank Pin Number Pin Type Pin Use Reg Use I/O Std I/O Style Reg Init State
Cnt1<2> 2 3 FB1 MC1       (b) (b) TFF     RESET
Cnt1<0> 1 1 FB1 MC2       (b) (b) TFF     RESET
Cnt10<3> 3 9 FB1 MC3   2 143 I/O/GSR GSR TFF   KPR RESET
Cnt10<1> 4 9 FB1 MC4   2 142 I/O (b) TFF     RESET
FClk 1 7 FB1 MC5       (b) (b) TFF     RESET
Cnt10<2> 2 7 FB1 MC6   2 140 I/O (b) TFF     RESET
FDivInstance/FDivCnt<6> 1 6 FB1 MC7       (b) (b) TFF     RESET
FDivInstance/FDivCnt<5> 1 5 FB1 MC8       (b) (b) TFF     RESET
FDivInstance/FDivCnt<4> 1 4 FB1 MC9       (b) (b) TFF     RESET
FDivInstance/FDivCnt<3> 1 3 FB1 MC10       (b) (b) TFF     RESET
FDivInstance/FDivCnt<2> 1 2 FB1 MC11       (b) (b) TFF     RESET
Cnt10<0> 2 5 FB1 MC12   2 139 I/O (b) TFF     RESET
Cnt1<3> 3 5 FB1 MC13   2 138 I/O (b) TFF     RESET
Cnt1<1> 3 5 FB1 MC14   2 137 I/O (b) TFF     RESET
FDivInstance/FDivCnt<1> 1 1 FB1 MC15       (b) (b) TFF     RESET
FDivInstance/FDivCnt<0> 0 0 FB1 MC16       (b) (b) TFF     RESET
DSel0 1 2 FB11 MC13 FAST 2 126 I/O O   LVCMOS18    
DSel1 1 2 FB11 MC14 FAST 2 128 I/O O   LVCMOS18    
DSel2 1 2 FB11 MC15 FAST 2 129 I/O O   LVCMOS18    
DSel3 1 2 FB11 MC16 FAST 2 130 I/O O   LVCMOS18    
Key0Instance/ShRegister<0> 1 1 FB12 MC15   2 94 I/O IR DFF   KPR  
KeyLed 2 4 FB14 MC4 FAST 1 69 I/O O LATCH/S LVCMOS18   SET
ModeLed 1 1 FB14 MC6 FAST 1 68 I/O O   LVCMOS18    
Seg_G 3 4 FB14 MC16 FAST 1 61 I/O O   LVCMOS18    
Seg_C 3 4 FB16 MC5 FAST 1 60 I/O O   LVCMOS18    
Seg_K 0 0 FB16 MC6 FAST 1 59 I/O O   LVCMOS18    
Seg_D 4 4 FB16 MC11 FAST 1 58 I/O O   LVCMOS18    
Seg_E 3 4 FB16 MC12 FAST 1 57 I/O O   LVCMOS18    
Seg_A 3 4 FB16 MC13 FAST 1 56 I/O O   LVCMOS18    
Seg_F 3 4 FB16 MC15 FAST 1 54 I/O O   LVCMOS18    
Seg_B 3 4 FB16 MC16 FAST 1 53 I/O O   LVCMOS18    
FDiv<3> 2 4 FB2 MC1   2 2 I/O/GTS2 (b) TFF     RESET
Cnt100<0> 2 9 FB2 MC2       (b) (b) TFF     RESET
FDiv<2> 2 3 FB2 MC3   2 3 I/O/GTS3 (b) TFF     RESET
FDiv<1> 2 2 FB2 MC4   2 4 I/O (b) TFF     RESET
FDiv<0> 1 1 FB2 MC5   2 5 I/O/GTS0 (b) TFF     RESET
Cnt100<2> 2 11 FB2 MC6       (b) (b) TFF     RESET
Cnt1000<0> 2 13 FB2 MC7       (b) (b) TFF     RESET
Cnt100<3> 3 13 FB2 MC8       (b) (b) TFF     RESET
Cnt100<1> 4 13 FB2 MC9       (b) (b) TFF     RESET
Cnt1000<2> 2 15 FB2 MC10       (b) (b) TFF     RESET
Cnt1000<3> 3 17 FB2 MC11       (b) (b) TFF     RESET
MuxDisplInstance/Tetr<3> 4 8 FB2 MC12   2 6 I/O/GTS1 (b)        
MuxDisplInstance/Tetr<2> 4 8 FB2 MC13   2 7 I/O (b)        
MuxDisplInstance/Tetr<1> 4 8 FB2 MC14   2 9 I/O (b)        
MuxDisplInstance/Tetr<0> 4 8 FB2 MC15   2 10 I/O (b)        
Cnt1000<1> 4 17 FB2 MC16       (b) (b) TFF     RESET
N_PZ_233 2 3 FB3 MC8       (b) (b)        
Key0Instance/ShRegister<3> 2 2 FB3 MC9       (b) (b) DFF     RESET
Key0Instance/ShRegister<2> 2 2 FB3 MC10       (b) (b) DFF     RESET
Key0Instance/ShRegister<1> 2 2 FB3 MC11       (b) (b) DFF     RESET
MuxDisplInstance/SelCnt<1> 2 2 FB3 MC12       (b) (b) TFF     RESET
MuxDisplInstance/SelCnt<0> 1 1 FB3 MC13       (b) (b) TFF     RESET
FDiv<4> 2 5 FB3 MC15       (b) (b) TFF     RESET