********** Mapped Logic ********** |
FTCPE_BinCnt0: FTCPE port map (BinCnt(0),BinCnt_T(0),FDiv(3),NOT Reset,'0','1');
BinCnt_T(0) <= ((NOT Context_FFd2 AND NOT Context_FFd1 AND NOT N_PZ_522) OR (NOT Context_FFd2 AND NOT Context_FFd1 AND BinCnt(0))); |
FTCPE_BinCnt1: FTCPE port map (BinCnt(1),BinCnt_T(1),FDiv(3),NOT Reset,'0','1');
BinCnt_T(1) <= ((NOT Context_FFd2 AND NOT Context_FFd1 AND N_PZ_522 AND BinCnt(1)) OR (NOT Context_FFd2 AND NOT Context_FFd1 AND NOT N_PZ_522 AND BinCnt(0))); |
FDCPE_BinCnt2: FDCPE port map (BinCnt(2),BinCnt_D(2),FDiv(3),NOT Reset,'0','1');
BinCnt_D(2) <= NOT (((BinCnt(2) AND N_PZ_457) OR (NOT BinCnt(2) AND NOT N_PZ_457) OR (NOT Context_FFd2 AND NOT Context_FFd1 AND N_PZ_522))); |
FDCPE_BinCnt3: FDCPE port map (BinCnt(3),BinCnt_D(3),FDiv(3),NOT Reset,'0','1');
BinCnt_D(3) <= NOT (((N_PZ_526) OR (NOT BinCnt(2) AND NOT BinCnt(3)) OR (NOT N_PZ_457 AND NOT BinCnt(3)) OR (NOT Context_FFd2 AND NOT Context_FFd1 AND N_PZ_522))); |
FDCPE_BinCnt4: FDCPE port map (BinCnt(4),BinCnt_D(4),FDiv(3),NOT Reset,'0','1');
BinCnt_D(4) <= NOT (((N_PZ_526 AND BinCnt(4)) OR (NOT N_PZ_526 AND NOT BinCnt(4)) OR (NOT Context_FFd2 AND NOT Context_FFd1 AND N_PZ_522))); |
FDCPE_BinCnt5: FDCPE port map (BinCnt(5),BinCnt_D(5),FDiv(3),NOT Reset,'0','1');
BinCnt_D(5) <= NOT (((NOT N_PZ_526 AND NOT BinCnt(5)) OR (NOT BinCnt(4) AND NOT BinCnt(5)) OR (NOT Context_FFd2 AND NOT Context_FFd1 AND N_PZ_522) OR (N_PZ_526 AND BinCnt(4) AND BinCnt(5)))); |
FTCPE_BinCnt6: FTCPE port map (BinCnt(6),BinCnt_T(6),FDiv(3),NOT Reset,'0','1');
BinCnt_T(6) <= ((Context_FFd2 AND N_PZ_526 AND BinCnt(4) AND BinCnt(5)) OR (NOT Context_FFd2 AND NOT Context_FFd1 AND N_PZ_522 AND BinCnt(6)) OR (Context_FFd1 AND N_PZ_526 AND BinCnt(4) AND BinCnt(5)) OR (NOT N_PZ_522 AND N_PZ_526 AND BinCnt(4) AND BinCnt(5))); |
FTCPE_BinCnt7: FTCPE port map (BinCnt(7),BinCnt_T(7),FDiv(3),NOT Reset,'0','1');
BinCnt_T(7) <= ((NOT Context_FFd2 AND NOT Context_FFd1 AND N_PZ_522 AND BinCnt(7)) OR (Context_FFd2 AND N_PZ_526 AND BinCnt(4) AND BinCnt(5) AND BinCnt(6)) OR (Context_FFd1 AND N_PZ_526 AND BinCnt(4) AND BinCnt(5) AND BinCnt(6)) OR (NOT N_PZ_522 AND N_PZ_526 AND BinCnt(4) AND BinCnt(5) AND BinCnt(6))); |
FDCPE_Context_FFd1: FDCPE port map (Context_FFd1,Context_FFd2,NOT Clk,NOT Reset,'0',Context_FFd1_CE);
Context_FFd1_CE <= (NOT MachineState_FFd1 AND MachineState_FFd2); |
FTCPE_Context_FFd2: FTCPE port map (Context_FFd2,Context_FFd2_T,NOT Clk,NOT Reset,'0','1');
Context_FFd2_T <= ((NOT MachineState_FFd1 AND MachineState_FFd2 AND Context_FFd2) OR (NOT MachineState_FFd1 AND MachineState_FFd2 AND NOT Context_FFd1)); |
DSel0 <= NOT ((NOT MuxDisplInstance/SelCnt(0) AND
NOT MuxDisplInstance/SelCnt(1))); |
DSel1 <= NOT ((MuxDisplInstance/SelCnt(0) AND
NOT MuxDisplInstance/SelCnt(1))); |
DSel2 <= NOT ((NOT MuxDisplInstance/SelCnt(0) AND
MuxDisplInstance/SelCnt(1))); |
DSel3 <= NOT ((MuxDisplInstance/SelCnt(0) AND
MuxDisplInstance/SelCnt(1))); |
FDCPE_DirKeyInstance/ShRegister0: FDCPE port map (DirKeyInstance/ShRegister(0),DirKeyInp,FDiv(4),'0',NOT Reset,'1'); |
FDCPE_DirKeyInstance/ShRegister1: FDCPE port map (DirKeyInstance/ShRegister(1),DirKeyInstance/ShRegister(0),FDiv(4),'0',NOT Reset,'1'); |
FDCPE_DirKeyInstance/ShRegister2: FDCPE port map (DirKeyInstance/ShRegister(2),DirKeyInstance/ShRegister(1),FDiv(4),'0',NOT Reset,'1'); |
FDCPE_DirKeyInstance/ShRegister3: FDCPE port map (DirKeyInstance/ShRegister(3),DirKeyInstance/ShRegister(2),FDiv(4),'0',NOT Reset,'1'); |
LDCP_DirKeyStatus: LDCP port map (DirKeyStatus,NOT '0',,DirKeyStatus_CLR,'0');
DirKeyStatus_G <= (NOT DirKeyInstance/ShRegister(0) AND NOT DirKeyInstance/ShRegister(1) AND NOT DirKeyInstance/ShRegister(2) AND NOT DirKeyInstance/ShRegister(3)); DirKeyStatus_CLR <= (DirKeyInstance/ShRegister(0) AND DirKeyInstance/ShRegister(1) AND DirKeyInstance/ShRegister(2) AND DirKeyInstance/ShRegister(3)); |
FTCPE_DirLed: FTCPE port map (DirLed,DirLed_T,NOT Clk,'0',NOT Reset,'1');
DirLed_T <= (MachineState_FFd1 AND MachineState_FFd2); |
FTCPE_FClk: FTCPE port map (FClk,FClk_T,NOT Clk,NOT Reset,'0','1');
FClk_T <= (FDivInstance/FDivCnt(0) AND FDivInstance/FDivCnt(1) AND FDivInstance/FDivCnt(2) AND FDivInstance/FDivCnt(3) AND FDivInstance/FDivCnt(4) AND FDivInstance/FDivCnt(5) AND FDivInstance/FDivCnt(6)); |
FTCPE_FDiv0: FTCPE port map (FDiv(0),'0',FClk,NOT Reset,'0','1'); |
FTCPE_FDiv1: FTCPE port map (FDiv(1),FDiv(0),FClk,NOT Reset,'0','1'); |
FTCPE_FDiv2: FTCPE port map (FDiv(2),FDiv_T(2),FClk,NOT Reset,'0','1');
FDiv_T(2) <= (FDiv(0) AND FDiv(1)); |
FTCPE_FDiv3: FTCPE port map (FDiv(3),FDiv_T(3),FClk,NOT Reset,'0','1');
FDiv_T(3) <= (FDiv(0) AND FDiv(1) AND FDiv(2)); |
FTCPE_FDiv4: FTCPE port map (FDiv(4),FDiv_T(4),FClk,NOT Reset,'0','1');
FDiv_T(4) <= (FDiv(3) AND FDiv(0) AND FDiv(1) AND FDiv(2)); |
FTCPE_FDiv5: FTCPE port map (FDiv(5),FDiv_T(5),FClk,NOT Reset,'0','1');
FDiv_T(5) <= (FDiv(3) AND FDiv(0) AND FDiv(1) AND FDiv(2) AND FDiv(4)); |
FTCPE_FDiv6: FTCPE port map (FDiv(6),FDiv_T(6),FClk,NOT Reset,'0','1');
FDiv_T(6) <= (FDiv(3) AND FDiv(0) AND FDiv(1) AND FDiv(2) AND FDiv(4) AND FDiv(5)); |
FTCPE_FDivInstance/FDivCnt0: FTCPE port map (FDivInstance/FDivCnt(0),'0',NOT Clk,NOT Reset,'0','1'); |
FTCPE_FDivInstance/FDivCnt1: FTCPE port map (FDivInstance/FDivCnt(1),FDivInstance/FDivCnt(0),NOT Clk,NOT Reset,'0','1'); |
FTCPE_FDivInstance/FDivCnt2: FTCPE port map (FDivInstance/FDivCnt(2),FDivInstance/FDivCnt_T(2),NOT Clk,NOT Reset,'0','1');
FDivInstance/FDivCnt_T(2) <= (FDivInstance/FDivCnt(0) AND FDivInstance/FDivCnt(1)); |
FTCPE_FDivInstance/FDivCnt3: FTCPE port map (FDivInstance/FDivCnt(3),FDivInstance/FDivCnt_T(3),NOT Clk,NOT Reset,'0','1');
FDivInstance/FDivCnt_T(3) <= (FDivInstance/FDivCnt(0) AND FDivInstance/FDivCnt(1) AND FDivInstance/FDivCnt(2)); |
FTCPE_FDivInstance/FDivCnt4: FTCPE port map (FDivInstance/FDivCnt(4),FDivInstance/FDivCnt_T(4),NOT Clk,NOT Reset,'0','1');
FDivInstance/FDivCnt_T(4) <= (FDivInstance/FDivCnt(0) AND FDivInstance/FDivCnt(1) AND FDivInstance/FDivCnt(2) AND FDivInstance/FDivCnt(3)); |
FTCPE_FDivInstance/FDivCnt5: FTCPE port map (FDivInstance/FDivCnt(5),FDivInstance/FDivCnt_T(5),NOT Clk,NOT Reset,'0','1');
FDivInstance/FDivCnt_T(5) <= (FDivInstance/FDivCnt(0) AND FDivInstance/FDivCnt(1) AND FDivInstance/FDivCnt(2) AND FDivInstance/FDivCnt(3) AND FDivInstance/FDivCnt(4)); |
FTCPE_FDivInstance/FDivCnt6: FTCPE port map (FDivInstance/FDivCnt(6),FDivInstance/FDivCnt_T(6),NOT Clk,NOT Reset,'0','1');
FDivInstance/FDivCnt_T(6) <= (FDivInstance/FDivCnt(0) AND FDivInstance/FDivCnt(1) AND FDivInstance/FDivCnt(2) AND FDivInstance/FDivCnt(3) AND FDivInstance/FDivCnt(4) AND FDivInstance/FDivCnt(5)); |
FTCPE_LCmpReg0: FTCPE port map (LCmpReg(0),Context_FFd2,SetKeyStatus,NOT Reset,'0','1'); |
FTCPE_LCmpReg1: FTCPE port map (LCmpReg(1),LCmpReg_T(1),SetKeyStatus,NOT Reset,'0','1');
LCmpReg_T(1) <= ((Context_FFd2 AND LCmpReg(0) AND DirLed) OR (Context_FFd2 AND NOT LCmpReg(0) AND NOT DirLed)); |
FTCPE_LCmpReg2: FTCPE port map (LCmpReg(2),LCmpReg_T(2),SetKeyStatus,NOT Reset,'0','1');
LCmpReg_T(2) <= ((Context_FFd2 AND LCmpReg(0) AND LCmpReg(1) AND DirLed) OR (Context_FFd2 AND NOT LCmpReg(0) AND NOT LCmpReg(1) AND NOT DirLed)); |
FTCPE_LCmpReg3: FTCPE port map (LCmpReg(3),LCmpReg_T(3),SetKeyStatus,NOT Reset,'0','1');
LCmpReg_T(3) <= ((Context_FFd2 AND LCmpReg(0) AND LCmpReg(1) AND DirLed AND LCmpReg(2)) OR (Context_FFd2 AND NOT LCmpReg(0) AND NOT LCmpReg(1) AND NOT DirLed AND NOT LCmpReg(2))); |
FTCPE_LCmpReg4: FTCPE port map (LCmpReg(4),LCmpReg_T(4),SetKeyStatus,NOT Reset,'0','1');
LCmpReg_T(4) <= ((Context_FFd2 AND LCmpReg(0) AND LCmpReg(1) AND DirLed AND LCmpReg(2) AND LCmpReg(3)) OR (Context_FFd2 AND NOT LCmpReg(0) AND NOT LCmpReg(1) AND NOT DirLed AND NOT LCmpReg(2) AND NOT LCmpReg(3))); |
FTCPE_LCmpReg5: FTCPE port map (LCmpReg(5),LCmpReg_T(5),SetKeyStatus,NOT Reset,'0','1');
LCmpReg_T(5) <= ((Context_FFd2 AND LCmpReg(0) AND LCmpReg(1) AND DirLed AND LCmpReg(2) AND LCmpReg(3) AND LCmpReg(4)) OR (Context_FFd2 AND NOT LCmpReg(0) AND NOT LCmpReg(1) AND NOT DirLed AND NOT LCmpReg(2) AND NOT LCmpReg(3) AND NOT LCmpReg(4))); |
FTCPE_LCmpReg6: FTCPE port map (LCmpReg(6),LCmpReg_T(6),SetKeyStatus,NOT Reset,'0','1');
LCmpReg_T(6) <= ((Context_FFd2 AND LCmpReg(0) AND LCmpReg(1) AND DirLed AND LCmpReg(2) AND LCmpReg(3) AND LCmpReg(4) AND LCmpReg(5)) OR (Context_FFd2 AND NOT LCmpReg(0) AND NOT LCmpReg(1) AND NOT DirLed AND NOT LCmpReg(2) AND NOT LCmpReg(3) AND NOT LCmpReg(4) AND NOT LCmpReg(5))); |
FTCPE_LCmpReg7: FTCPE port map (LCmpReg(7),LCmpReg_T(7),SetKeyStatus,'0',NOT Reset,'1');
LCmpReg_T(7) <= ((Context_FFd2 AND LCmpReg(0) AND LCmpReg(1) AND DirLed AND LCmpReg(2) AND LCmpReg(3) AND LCmpReg(4) AND LCmpReg(5) AND LCmpReg(6)) OR (Context_FFd2 AND NOT LCmpReg(0) AND NOT LCmpReg(1) AND NOT DirLed AND NOT LCmpReg(2) AND NOT LCmpReg(3) AND NOT LCmpReg(4) AND NOT LCmpReg(5) AND NOT LCmpReg(6))); |
FDCPE_MachineState_FFd1: FDCPE port map (MachineState_FFd1,MachineState_FFd1_D,NOT Clk,NOT Reset,'0','1');
MachineState_FFd1_D <= NOT (((NOT MachineState_FFd1 AND NOT MachineState_FFd2 AND ModeKeyStatus) OR (NOT MachineState_FFd2 AND NOT ModeKeyStatus AND NOT DirKeyStatus))); |
FDCPE_MachineState_FFd2: FDCPE port map (MachineState_FFd2,MachineState_FFd2_D,NOT Clk,NOT Reset,'0','1');
MachineState_FFd2_D <= ((NOT MachineState_FFd1 AND NOT MachineState_FFd2 AND ModeKeyStatus) OR (NOT MachineState_FFd1 AND NOT MachineState_FFd2 AND DirKeyStatus)); |
Mcompar_BinCnt_cmp_eq0000_AEB_or0000 <= ((BinCnt(0) AND NOT LCmpReg(0))
OR (NOT BinCnt(0) AND LCmpReg(0)) OR (BinCnt(1) AND NOT LCmpReg(1)) OR (NOT BinCnt(1) AND LCmpReg(1)) OR (BinCnt(2) AND NOT LCmpReg(2)) OR (NOT BinCnt(2) AND LCmpReg(2)) OR (BinCnt(3) AND NOT LCmpReg(3)) OR (NOT BinCnt(3) AND LCmpReg(3)) OR (BinCnt(4) AND NOT LCmpReg(4)) OR (NOT BinCnt(4) AND LCmpReg(4)) OR (BinCnt(5) AND NOT LCmpReg(5)) OR (NOT BinCnt(5) AND LCmpReg(5)) OR (BinCnt(6) AND NOT LCmpReg(6)) OR (NOT BinCnt(6) AND LCmpReg(6)) OR (BinCnt(7) AND NOT LCmpReg(7)) OR (NOT BinCnt(7) AND LCmpReg(7))); |
ModeKeyInstance/ShRegister(0).COMB <= (Reset AND SetupKeyInstance/DelayCntClear);FDCPE_ModeKeyInstance/ShRegister0: FDCPE port map (ModeKeyInstance/ShRegister(0),ModeKeyInp,FDiv(4),'0',NOT Reset,'1'); |
FDCPE_ModeKeyInstance/ShRegister1: FDCPE port map (ModeKeyInstance/ShRegister(1),ModeKeyInstance/ShRegister(0),FDiv(4),'0',NOT Reset,'1'); |
FDCPE_ModeKeyInstance/ShRegister2: FDCPE port map (ModeKeyInstance/ShRegister(2),ModeKeyInstance/ShRegister(1),FDiv(4),'0',NOT Reset,'1'); |
FDCPE_ModeKeyInstance/ShRegister3: FDCPE port map (ModeKeyInstance/ShRegister(3),ModeKeyInstance/ShRegister(2),FDiv(4),'0',NOT Reset,'1'); |
LDCP_ModeKeyStatus: LDCP port map (ModeKeyStatus,NOT '0',,ModeKeyStatus_CLR,'0');
ModeKeyStatus_G <= (NOT ModeKeyInstance/ShRegister(0) AND NOT ModeKeyInstance/ShRegister(1) AND NOT ModeKeyInstance/ShRegister(2) AND NOT ModeKeyInstance/ShRegister(3)); ModeKeyStatus_CLR <= (ModeKeyInstance/ShRegister(0) AND ModeKeyInstance/ShRegister(1) AND ModeKeyInstance/ShRegister(2) AND ModeKeyInstance/ShRegister(3)); |
FTCPE_MuxDisplInstance/SelCnt0: FTCPE port map (MuxDisplInstance/SelCnt(0),'0',FDiv(3),NOT Reset,'0','1'); |
FTCPE_MuxDisplInstance/SelCnt1: FTCPE port map (MuxDisplInstance/SelCnt(1),MuxDisplInstance/SelCnt(0),FDiv(3),NOT Reset,'0','1'); |
MuxDisplInstance/Tetr(0) <= ((LCmpReg(0) AND NOT DSel0)
OR (LCmpReg(4) AND NOT DSel1) OR (UCmpReg(0) AND NOT DSel2) OR (UCmpReg(4) AND NOT DSel3)); |
MuxDisplInstance/Tetr(1) <= ((LCmpReg(1) AND NOT DSel0)
OR (LCmpReg(5) AND NOT DSel1) OR (UCmpReg(1) AND NOT DSel2) OR (UCmpReg(5) AND NOT DSel3)); |
MuxDisplInstance/Tetr(2) <= ((LCmpReg(2) AND NOT DSel0)
OR (LCmpReg(6) AND NOT DSel1) OR (UCmpReg(2) AND NOT DSel2) OR (UCmpReg(6) AND NOT DSel3)); |
MuxDisplInstance/Tetr(3) <= ((LCmpReg(3) AND NOT DSel0)
OR (LCmpReg(7) AND NOT DSel1) OR (UCmpReg(3) AND NOT DSel2) OR (UCmpReg(7) AND NOT DSel3)); |
N_PZ_456 <= ((BinCnt(3) AND NOT UCmpReg(3))
OR (NOT BinCnt(3) AND UCmpReg(3))); |
N_PZ_457 <= (NOT Context_FFd2 AND NOT Context_FFd1 AND BinCnt(0) AND
BinCnt(1)); |
N_PZ_521 <= ((BinCnt(4) AND NOT UCmpReg(4))
OR (NOT BinCnt(4) AND UCmpReg(4))); |
N_PZ_522 <= ((NOT OutSig AND NOT Mcompar_BinCnt_cmp_eq0000_AEB_or0000)
OR (OutSig AND BinCnt(0) AND BinCnt(1) AND BinCnt(2) AND UCmpReg(0) AND UCmpReg(1) AND UCmpReg(2) AND NOT OutFF_or000039 AND NOT OutFF_or000040 AND NOT OutFF_or000041 AND NOT OutFF_or000047 AND NOT OutFF_or000048 AND NOT OutFF_or000049 AND NOT N_PZ_456 AND NOT N_PZ_521) OR (OutSig AND BinCnt(0) AND BinCnt(1) AND NOT BinCnt(2) AND UCmpReg(0) AND UCmpReg(1) AND NOT UCmpReg(2) AND NOT OutFF_or000039 AND NOT OutFF_or000040 AND NOT OutFF_or000041 AND NOT OutFF_or000047 AND NOT OutFF_or000048 AND NOT OutFF_or000049 AND NOT N_PZ_456 AND NOT N_PZ_521) OR (OutSig AND BinCnt(0) AND NOT BinCnt(1) AND BinCnt(2) AND UCmpReg(0) AND NOT UCmpReg(1) AND UCmpReg(2) AND NOT OutFF_or000039 AND NOT OutFF_or000040 AND NOT OutFF_or000041 AND NOT OutFF_or000047 AND NOT OutFF_or000048 AND NOT OutFF_or000049 AND NOT N_PZ_456 AND NOT N_PZ_521) OR (OutSig AND BinCnt(0) AND NOT BinCnt(1) AND NOT BinCnt(2) AND UCmpReg(0) AND NOT UCmpReg(1) AND NOT UCmpReg(2) AND NOT OutFF_or000039 AND NOT OutFF_or000040 AND NOT OutFF_or000041 AND NOT OutFF_or000047 AND NOT OutFF_or000048 AND NOT OutFF_or000049 AND NOT N_PZ_456 AND NOT N_PZ_521) OR (OutSig AND NOT BinCnt(0) AND BinCnt(1) AND BinCnt(2) AND NOT UCmpReg(0) AND UCmpReg(1) AND UCmpReg(2) AND NOT OutFF_or000039 AND NOT OutFF_or000040 AND NOT OutFF_or000041 AND NOT OutFF_or000047 AND NOT OutFF_or000048 AND NOT OutFF_or000049 AND NOT N_PZ_456 AND NOT N_PZ_521) OR (OutSig AND NOT BinCnt(0) AND BinCnt(1) AND NOT BinCnt(2) AND NOT UCmpReg(0) AND UCmpReg(1) AND NOT UCmpReg(2) AND NOT OutFF_or000039 AND NOT OutFF_or000040 AND NOT OutFF_or000041 AND NOT OutFF_or000047 AND NOT OutFF_or000048 AND NOT OutFF_or000049 AND NOT N_PZ_456 AND NOT N_PZ_521) OR (OutSig AND NOT BinCnt(0) AND NOT BinCnt(1) AND BinCnt(2) AND NOT UCmpReg(0) AND NOT UCmpReg(1) AND UCmpReg(2) AND NOT OutFF_or000039 AND NOT OutFF_or000040 AND NOT OutFF_or000041 AND NOT OutFF_or000047 AND NOT OutFF_or000048 AND NOT OutFF_or000049 AND NOT N_PZ_456 AND NOT N_PZ_521) OR (OutSig AND NOT BinCnt(0) AND NOT BinCnt(1) AND NOT BinCnt(2) AND NOT UCmpReg(0) AND NOT UCmpReg(1) AND NOT UCmpReg(2) AND NOT OutFF_or000039 AND NOT OutFF_or000040 AND NOT OutFF_or000041 AND NOT OutFF_or000047 AND NOT OutFF_or000048 AND NOT OutFF_or000049 AND NOT N_PZ_456 AND NOT N_PZ_521)); |
N_PZ_526 <= (BinCnt(2) AND N_PZ_457 AND BinCnt(3)); |
OutFF_or000039 <= (BinCnt(5) AND NOT UCmpReg(5)); |
OutFF_or000040 <= (BinCnt(6) AND NOT UCmpReg(6)); |
OutFF_or000041 <= (BinCnt(7) AND NOT UCmpReg(7)); |
OutFF_or000047 <= (NOT BinCnt(5) AND UCmpReg(5)); |
OutFF_or000048 <= (NOT BinCnt(6) AND UCmpReg(6)); |
OutFF_or000049 <= (NOT BinCnt(7) AND UCmpReg(7)); |
FTCPE_OutSig: FTCPE port map (OutSig,OutSig_T,FDiv(3),NOT Reset,'0','1');
OutSig_T <= (NOT Context_FFd2 AND NOT Context_FFd1 AND N_PZ_522); |
Seg_A <= (NOT MuxDisplInstance/Tetr(1) AND
MuxDisplInstance/Tetr(0)) XOR ((NOT MuxDisplInstance/Tetr(1) AND NOT MuxDisplInstance/Tetr(3) AND MuxDisplInstance/Tetr(2)) OR (MuxDisplInstance/Tetr(0) AND MuxDisplInstance/Tetr(3) AND NOT MuxDisplInstance/Tetr(2))); |
Seg_B <= (NOT MuxDisplInstance/Tetr(0) AND
MuxDisplInstance/Tetr(2)) XOR ((MuxDisplInstance/Tetr(1) AND MuxDisplInstance/Tetr(0) AND MuxDisplInstance/Tetr(3)) OR (NOT MuxDisplInstance/Tetr(1) AND NOT MuxDisplInstance/Tetr(3) AND MuxDisplInstance/Tetr(2))); |
Seg_C <= ((MuxDisplInstance/Tetr(1) AND
MuxDisplInstance/Tetr(3) AND MuxDisplInstance/Tetr(2)) OR (NOT MuxDisplInstance/Tetr(0) AND MuxDisplInstance/Tetr(3) AND MuxDisplInstance/Tetr(2)) OR (MuxDisplInstance/Tetr(1) AND NOT MuxDisplInstance/Tetr(0) AND NOT MuxDisplInstance/Tetr(3) AND NOT MuxDisplInstance/Tetr(2))); |
Seg_D <= ((MuxDisplInstance/Tetr(1) AND
MuxDisplInstance/Tetr(0) AND MuxDisplInstance/Tetr(2)) OR (MuxDisplInstance/Tetr(1) AND NOT MuxDisplInstance/Tetr(0) AND MuxDisplInstance/Tetr(3) AND NOT MuxDisplInstance/Tetr(2)) OR (NOT MuxDisplInstance/Tetr(1) AND MuxDisplInstance/Tetr(0) AND NOT MuxDisplInstance/Tetr(3) AND NOT MuxDisplInstance/Tetr(2)) OR (NOT MuxDisplInstance/Tetr(1) AND NOT MuxDisplInstance/Tetr(0) AND NOT MuxDisplInstance/Tetr(3) AND MuxDisplInstance/Tetr(2))); |
Seg_E <= ((MuxDisplInstance/Tetr(0) AND
NOT MuxDisplInstance/Tetr(3)) OR (NOT MuxDisplInstance/Tetr(1) AND MuxDisplInstance/Tetr(0) AND NOT MuxDisplInstance/Tetr(2)) OR (NOT MuxDisplInstance/Tetr(1) AND NOT MuxDisplInstance/Tetr(3) AND MuxDisplInstance/Tetr(2))); |
Seg_F <= (MuxDisplInstance/Tetr(0) AND
NOT MuxDisplInstance/Tetr(3)) XOR ((NOT MuxDisplInstance/Tetr(1) AND MuxDisplInstance/Tetr(0) AND MuxDisplInstance/Tetr(2)) OR (MuxDisplInstance/Tetr(1) AND NOT MuxDisplInstance/Tetr(0) AND NOT MuxDisplInstance/Tetr(3) AND NOT MuxDisplInstance/Tetr(2))); |
Seg_G <= ((NOT MuxDisplInstance/Tetr(1) AND
NOT MuxDisplInstance/Tetr(3) AND NOT MuxDisplInstance/Tetr(2)) OR (MuxDisplInstance/Tetr(1) AND MuxDisplInstance/Tetr(0) AND NOT MuxDisplInstance/Tetr(3) AND MuxDisplInstance/Tetr(2)) OR (NOT MuxDisplInstance/Tetr(1) AND NOT MuxDisplInstance/Tetr(0) AND MuxDisplInstance/Tetr(3) AND MuxDisplInstance/Tetr(2))); |
Seg_K <= NOT (((Context_FFd2 AND Context_FFd1)
OR (Context_FFd2 AND DSel2 AND DSel3) OR (Context_FFd1 AND DSel1 AND DSel0) OR (DSel2 AND DSel1 AND DSel0 AND DSel3))); |
FDCPE_SetKeyStatus: FDCPE port map (SetKeyStatus,SetKeyStatus_D,Clk,'0','0','1');
SetKeyStatus_D <= ((NOT Reset AND SetKeyStatus) OR (Reset AND SetupKeyInstance/AutomatState_FFd4 AND SetupKeyInstance/AutomatState_FFd2 AND NOT SetupKeyInstance/AutomatState_FFd3) OR (Reset AND NOT SetupKeyInstance/AutomatState_FFd4 AND NOT SetupKeyInstance/AutomatState_FFd2 AND SetupKeyInstance/AutomatState_FFd3)); |
FDCPE_SetupKeyInstance/AutomatState_FFd1: FDCPE port map (SetupKeyInstance/AutomatState_FFd1,SetupKeyInstance/AutomatState_FFd1_D,Clk,NOT Reset,'0','1');
SetupKeyInstance/AutomatState_FFd1_D <= ((SetupKeyInstance/AutomatState_FFd4 AND SetupKeyInstance/AutomatState_FFd2 AND NOT SetupKeyInstance/AutomatState_FFd3) OR (NOT SetKeyInp AND SetupKeyInstance/AutomatState_FFd1 AND SetupKeyInstance/DelayCnt(0)) OR (NOT SetKeyInp AND SetupKeyInstance/AutomatState_FFd1 AND SetupKeyInstance/DelayCnt(1)) OR (NOT SetKeyInp AND SetupKeyInstance/AutomatState_FFd1 AND NOT SetupKeyInstance/DelayCnt(2)) OR (NOT SetKeyInp AND SetupKeyInstance/AutomatState_FFd1 AND SetupKeyInstance/DelayCnt(3)) OR (NOT SetKeyInp AND SetupKeyInstance/AutomatState_FFd1 AND SetupKeyInstance/DelayCnt(4))); |
FDCPE_SetupKeyInstance/AutomatState_FFd2: FDCPE port map (SetupKeyInstance/AutomatState_FFd2,SetupKeyInstance/AutomatState_FFd2_D,Clk,NOT Reset,'0','1');
SetupKeyInstance/AutomatState_FFd2_D <= NOT (((SetupKeyInstance/AutomatState_FFd4 AND NOT SetupKeyInstance/AutomatState_FFd2 AND NOT SetupKeyInstance/AutomatState_FFd1) OR (NOT SetupKeyInstance/AutomatState_FFd2 AND NOT SetupKeyInstance/AutomatState_FFd1 AND NOT SetupKeyInstance/AutomatState_FFd3) OR (NOT SetupKeyInstance/AutomatState_FFd4 AND NOT SetupKeyInstance/AutomatState_FFd1 AND NOT SetupKeyInstance/AutomatState_FFd3 AND SetupKeyInstance/DelayCnt(0) AND SetupKeyInstance/DelayCnt(1) AND NOT SetupKeyInstance/DelayCnt(2) AND NOT SetupKeyInstance/DelayCnt(3) AND NOT SetupKeyInstance/DelayCnt(4)))); |
FTCPE_SetupKeyInstance/AutomatState_FFd3: FTCPE port map (SetupKeyInstance/AutomatState_FFd3,SetupKeyInstance/AutomatState_FFd3_T,Clk,NOT Reset,'0','1');
SetupKeyInstance/AutomatState_FFd3_T <= ((SetupKeyInstance/AutomatState_FFd4 AND NOT SetupKeyInstance/AutomatState_FFd2 AND NOT SetupKeyInstance/AutomatState_FFd3) OR (SetKeyInp AND SetupKeyInstance/AutomatState_FFd1 AND NOT SetupKeyInstance/AutomatState_FFd3) OR (SetupKeyInstance/AutomatState_FFd4 AND SetKeyInp AND NOT SetupKeyInstance/AutomatState_FFd1 AND SetupKeyInstance/AutomatState_FFd3) OR (SetupKeyInstance/AutomatState_FFd4 AND NOT SetKeyInp AND SetupKeyInstance/AutomatState_FFd2 AND SetupKeyInstance/AutomatState_FFd3) OR (NOT SetKeyInp AND SetupKeyInstance/AutomatState_FFd2 AND SetupKeyInstance/AutomatState_FFd3 AND NOT SetupKeyInstance/DelayCnt(0) AND NOT SetupKeyInstance/DelayCnt(1) AND SetupKeyInstance/DelayCnt(2) AND SetupKeyInstance/DelayCnt(3) AND SetupKeyInstance/DelayCnt(4))); |
FDCPE_SetupKeyInstance/AutomatState_FFd4: FDCPE port map (SetupKeyInstance/AutomatState_FFd4,SetupKeyInstance/AutomatState_FFd4_D,Clk,NOT Reset,'0','1');
SetupKeyInstance/AutomatState_FFd4_D <= (SetupKeyInstance/AutomatState_FFd4 AND NOT SetKeyInp AND NOT SetupKeyInstance/AutomatState_FFd2) XOR ((SetKeyInp AND SetupKeyInstance/AutomatState_FFd1) OR (SetupKeyInstance/AutomatState_FFd4 AND SetKeyInp AND NOT SetupKeyInstance/AutomatState_FFd2 AND NOT SetupKeyInstance/AutomatState_FFd3) OR (NOT SetupKeyInstance/AutomatState_FFd4 AND SetKeyInp AND SetupKeyInstance/AutomatState_FFd2 AND SetupKeyInstance/AutomatState_FFd3) OR (NOT SetupKeyInstance/AutomatState_FFd4 AND NOT SetKeyInp AND NOT SetupKeyInstance/AutomatState_FFd2 AND NOT SetupKeyInstance/AutomatState_FFd3) OR (NOT SetupKeyInstance/AutomatState_FFd4 AND SetupKeyInstance/AutomatState_FFd1 AND NOT SetupKeyInstance/DelayCnt(0) AND NOT SetupKeyInstance/DelayCnt(1) AND SetupKeyInstance/DelayCnt(2) AND NOT SetupKeyInstance/DelayCnt(3) AND NOT SetupKeyInstance/DelayCnt(4)) OR (SetupKeyInstance/AutomatState_FFd2 AND SetupKeyInstance/AutomatState_FFd1 AND NOT SetupKeyInstance/DelayCnt(0) AND NOT SetupKeyInstance/DelayCnt(1) AND SetupKeyInstance/DelayCnt(2) AND NOT SetupKeyInstance/DelayCnt(3) AND NOT SetupKeyInstance/DelayCnt(4)) OR (NOT SetupKeyInstance/AutomatState_FFd4 AND SetupKeyInstance/AutomatState_FFd2 AND SetupKeyInstance/AutomatState_FFd3 AND NOT SetupKeyInstance/DelayCnt(0) AND NOT SetupKeyInstance/DelayCnt(1) AND SetupKeyInstance/DelayCnt(2) AND SetupKeyInstance/DelayCnt(3) AND SetupKeyInstance/DelayCnt(4)) OR (SetupKeyInstance/AutomatState_FFd4 AND NOT SetKeyInp AND NOT SetupKeyInstance/AutomatState_FFd2 AND SetupKeyInstance/AutomatState_FFd3 AND SetupKeyInstance/DelayCnt(0) AND SetupKeyInstance/DelayCnt(1) AND NOT SetupKeyInstance/DelayCnt(2) AND NOT SetupKeyInstance/DelayCnt(3) AND NOT SetupKeyInstance/DelayCnt(4))); |
FTCPE_SetupKeyInstance/DelayCnt0: FTCPE port map (SetupKeyInstance/DelayCnt(0),SetupKeyInstance/DelayCntEnable,FDiv(6),NOT ModeKeyInstance/ShRegister(0).COMB,'0','1'); |
FTCPE_SetupKeyInstance/DelayCnt1: FTCPE port map (SetupKeyInstance/DelayCnt(1),SetupKeyInstance/DelayCnt_T(1),FDiv(6),NOT ModeKeyInstance/ShRegister(0).COMB,'0','1');
SetupKeyInstance/DelayCnt_T(1) <= (SetupKeyInstance/DelayCnt(0) AND SetupKeyInstance/DelayCntEnable); |
FTCPE_SetupKeyInstance/DelayCnt2: FTCPE port map (SetupKeyInstance/DelayCnt(2),SetupKeyInstance/DelayCnt_T(2),FDiv(6),NOT ModeKeyInstance/ShRegister(0).COMB,'0','1');
SetupKeyInstance/DelayCnt_T(2) <= (SetupKeyInstance/DelayCnt(0) AND SetupKeyInstance/DelayCntEnable AND SetupKeyInstance/DelayCnt(1)); |
FTCPE_SetupKeyInstance/DelayCnt3: FTCPE port map (SetupKeyInstance/DelayCnt(3),SetupKeyInstance/DelayCnt_T(3),FDiv(6),NOT ModeKeyInstance/ShRegister(0).COMB,'0','1');
SetupKeyInstance/DelayCnt_T(3) <= (SetupKeyInstance/DelayCnt(0) AND SetupKeyInstance/DelayCntEnable AND SetupKeyInstance/DelayCnt(1) AND SetupKeyInstance/DelayCnt(2)); |
FTCPE_SetupKeyInstance/DelayCnt4: FTCPE port map (SetupKeyInstance/DelayCnt(4),SetupKeyInstance/DelayCnt_T(4),FDiv(6),NOT ModeKeyInstance/ShRegister(0).COMB,'0','1');
SetupKeyInstance/DelayCnt_T(4) <= (SetupKeyInstance/DelayCnt(0) AND SetupKeyInstance/DelayCntEnable AND SetupKeyInstance/DelayCnt(1) AND SetupKeyInstance/DelayCnt(2) AND SetupKeyInstance/DelayCnt(3)); |
FDCPE_SetupKeyInstance/DelayCntClear: FDCPE port map (SetupKeyInstance/DelayCntClear,SetupKeyInstance/DelayCntClear_D,Clk,'0','0','1');
SetupKeyInstance/DelayCntClear_D <= NOT (((NOT Reset AND NOT SetupKeyInstance/DelayCntClear) OR (Reset AND SetupKeyInstance/AutomatState_FFd4 AND SetupKeyInstance/AutomatState_FFd2 AND NOT SetupKeyInstance/AutomatState_FFd1) OR (Reset AND SetupKeyInstance/AutomatState_FFd4 AND NOT SetupKeyInstance/AutomatState_FFd1 AND NOT SetupKeyInstance/AutomatState_FFd3))); |
FDCPE_SetupKeyInstance/DelayCntEnable: FDCPE port map (SetupKeyInstance/DelayCntEnable,SetupKeyInstance/DelayCntEnable_D,Clk,'0','0','1');
SetupKeyInstance/DelayCntEnable_D <= NOT (((NOT Reset AND NOT SetupKeyInstance/DelayCntEnable) OR (Reset AND SetupKeyInstance/AutomatState_FFd4 AND SetupKeyInstance/AutomatState_FFd2 AND NOT SetupKeyInstance/AutomatState_FFd1) OR (Reset AND NOT SetupKeyInstance/AutomatState_FFd2 AND NOT SetupKeyInstance/AutomatState_FFd1 AND NOT SetupKeyInstance/AutomatState_FFd3))); |
FTCPE_UCmpReg0: FTCPE port map (UCmpReg(0),Context_FFd1,SetKeyStatus,NOT Reset,'0','1'); |
FTCPE_UCmpReg1: FTCPE port map (UCmpReg(1),UCmpReg_T(1),SetKeyStatus,NOT Reset,'0','1');
UCmpReg_T(1) <= ((Context_FFd1 AND DirLed AND UCmpReg(0)) OR (Context_FFd1 AND NOT DirLed AND NOT UCmpReg(0))); |
FTCPE_UCmpReg2: FTCPE port map (UCmpReg(2),UCmpReg_T(2),SetKeyStatus,NOT Reset,'0','1');
UCmpReg_T(2) <= ((Context_FFd1 AND DirLed AND UCmpReg(0) AND UCmpReg(1)) OR (Context_FFd1 AND NOT DirLed AND NOT UCmpReg(0) AND NOT UCmpReg(1))); |
FTCPE_UCmpReg3: FTCPE port map (UCmpReg(3),UCmpReg_T(3),SetKeyStatus,NOT Reset,'0','1');
UCmpReg_T(3) <= ((Context_FFd1 AND DirLed AND UCmpReg(0) AND UCmpReg(1) AND UCmpReg(2)) OR (Context_FFd1 AND NOT DirLed AND NOT UCmpReg(0) AND NOT UCmpReg(1) AND NOT UCmpReg(2))); |
FTCPE_UCmpReg4: FTCPE port map (UCmpReg(4),UCmpReg_T(4),SetKeyStatus,NOT Reset,'0','1');
UCmpReg_T(4) <= ((Context_FFd1 AND DirLed AND UCmpReg(0) AND UCmpReg(1) AND UCmpReg(2) AND UCmpReg(3)) OR (Context_FFd1 AND NOT DirLed AND NOT UCmpReg(0) AND NOT UCmpReg(1) AND NOT UCmpReg(2) AND NOT UCmpReg(3))); |
FTCPE_UCmpReg5: FTCPE port map (UCmpReg(5),UCmpReg_T(5),SetKeyStatus,NOT Reset,'0','1');
UCmpReg_T(5) <= ((Context_FFd1 AND DirLed AND UCmpReg(0) AND UCmpReg(1) AND UCmpReg(2) AND UCmpReg(3) AND UCmpReg(4)) OR (Context_FFd1 AND NOT DirLed AND NOT UCmpReg(0) AND NOT UCmpReg(1) AND NOT UCmpReg(2) AND NOT UCmpReg(3) AND NOT UCmpReg(4))); |
FTCPE_UCmpReg6: FTCPE port map (UCmpReg(6),UCmpReg_T(6),SetKeyStatus,NOT Reset,'0','1');
UCmpReg_T(6) <= ((Context_FFd1 AND DirLed AND UCmpReg(0) AND UCmpReg(1) AND UCmpReg(2) AND UCmpReg(5) AND UCmpReg(3) AND UCmpReg(4)) OR (Context_FFd1 AND NOT DirLed AND NOT UCmpReg(0) AND NOT UCmpReg(1) AND NOT UCmpReg(2) AND NOT UCmpReg(5) AND NOT UCmpReg(3) AND NOT UCmpReg(4))); |
FTCPE_UCmpReg7: FTCPE port map (UCmpReg(7),UCmpReg_T(7),SetKeyStatus,'0',NOT Reset,'1');
UCmpReg_T(7) <= ((Context_FFd1 AND DirLed AND UCmpReg(0) AND UCmpReg(1) AND UCmpReg(2) AND UCmpReg(5) AND UCmpReg(3) AND UCmpReg(4) AND UCmpReg(6)) OR (Context_FFd1 AND NOT DirLed AND NOT UCmpReg(0) AND NOT UCmpReg(1) AND NOT UCmpReg(2) AND NOT UCmpReg(5) AND NOT UCmpReg(3) AND NOT UCmpReg(4) AND NOT UCmpReg(6))); |
Register Legend:
FDCPE (Q,D,C,CLR,PRE,CE); FDDCPE (Q,D,C,CLR,PRE,CE); FTCPE (Q,D,C,CLR,PRE,CE); FTDCPE (Q,D,C,CLR,PRE,CE); LDCP (Q,D,G,CLR,PRE); |